Hi E Shattow, On 00:02 Fri 02 Oct , E Shattow wrote: > Hi Yixun, > > On 10/1/26 18:03, Yixun Lan wrote: > > Add initial support for K3 Pico-ITX board, in this version, the DRAM > > information is parsed from DTS "/memory" node. And with UART enabled, > > the U-Boot serial console works fine now. > > > > Signed-off-by: Yixun Lan <[email protected]> > > --- > > arch/riscv/Kconfig | 5 +++++ > > arch/riscv/cpu/k3/Kconfig | 18 ++++++++++++++++++ > > arch/riscv/cpu/k3/Makefile | 5 +++++ > > arch/riscv/cpu/k3/dram.c | 21 +++++++++++++++++++++ > > board/spacemit/k3/Kconfig | 30 ++++++++++++++++++++++++++++++ > > board/spacemit/k3/MAINTAINERS | 8 ++++++++ > > include/configs/k3.h | 13 +++++++++++++ > > 7 files changed, 100 insertions(+) > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > index c1b2890f1f3..386241efd4a 100644 > > --- a/arch/riscv/Kconfig > > +++ b/arch/riscv/Kconfig > > @@ -53,6 +53,9 @@ config TARGET_SIPEED_MAIX > > config TARGET_SPACEMIT_K1 > > bool "Support Spacemit K1 SoC" > > > > +config TARGET_SPACEMIT_K3 > > + bool "Support SpacemiT K3 SoC" > > + > > config TARGET_STARFIVE_VISIONFIVE2 > > bool "Support StarFive VisionFive2 Board" > > select BOARD_LATE_INIT > > @@ -124,6 +127,7 @@ source "board/sophgo/milkv_duo/Kconfig" > > source "board/sophgo/milkv_duo_256m/Kconfig" > > source "board/sophgo/licheerv_nano/Kconfig" > > source "board/spacemit/k1/Kconfig" > > +source "board/spacemit/k3/Kconfig" > > source "board/starfive/visionfive2/Kconfig" > > source "board/thead/th1520_lpi4a/Kconfig" > > source "board/xilinx/mbv/Kconfig" > > @@ -138,6 +142,7 @@ source "arch/riscv/cpu/mpfs/Kconfig" > > source "arch/riscv/cpu/generic/Kconfig" > > source "arch/riscv/cpu/jh7110/Kconfig" > > source "arch/riscv/cpu/k1/Kconfig" > > +source "arch/riscv/cpu/k3/Kconfig" > > source "arch/riscv/cpu/k230/Kconfig" > > source "arch/riscv/cpu/th1520/Kconfig" > > > > diff --git a/arch/riscv/cpu/k3/Kconfig b/arch/riscv/cpu/k3/Kconfig > > new file mode 100644 > > index 00000000000..5474ac11243 > > --- /dev/null > > +++ b/arch/riscv/cpu/k3/Kconfig > > @@ -0,0 +1,18 @@ > > +# SPDX-License-Identifier: GPL-2.0-or-later > > +# > > +# Copyright (C) 2026 Yixun Lan <[email protected]> > > + > > +if TARGET_SPACEMIT_K3 > > + > > +config SPACEMIT_K3 > > + bool > > + select BINMAN > > + select ARCH_EARLY_INIT_R > > + select SYS_CACHE_SHIFT_6 > > + imply CPU > > + imply CPU_RISCV > > + imply RISCV_TIMER if RISCV_SMODE > > + imply CMD_CPU > > + imply OF_UPSTREAM > > + > > +endif > > diff --git a/arch/riscv/cpu/k3/Makefile b/arch/riscv/cpu/k3/Makefile > > new file mode 100644 > > index 00000000000..fba4e4b0a3f > > --- /dev/null > > +++ b/arch/riscv/cpu/k3/Makefile > > @@ -0,0 +1,5 @@ > > +# SPDX-License-Identifier: GPL-2.0-or-later > > +# > > +# Copyright (C) 2026 Yixun Lan <[email protected]> > > + > > +obj-y += dram.o > > diff --git a/arch/riscv/cpu/k3/dram.c b/arch/riscv/cpu/k3/dram.c > > new file mode 100644 > > index 00000000000..e20d35dc1bf > > --- /dev/null > > +++ b/arch/riscv/cpu/k3/dram.c > > @@ -0,0 +1,21 @@ > > +// SPDX-License-Identifier: GPL-2.0-or-later > > +/* > > + * Copyright (C) 2026 Yixun Lan <[email protected]> > > + */ > > + > > +#include <fdtdec.h> > > +#include <init.h> > > +#include <linux/sizes.h> > > +#include <asm/global_data.h> > > + > > +DECLARE_GLOBAL_DATA_PTR; > > + > > +int dram_init(void) > > +{ > > + return fdtdec_setup_mem_size_base(); > > +} > > + > > +int dram_init_banksize(void) > > +{ > > + return fdtdec_setup_memory_banksize(); > > +} > > diff --git a/board/spacemit/k3/Kconfig b/board/spacemit/k3/Kconfig > > new file mode 100644 > > index 00000000000..b0e423d829c > > --- /dev/null > > +++ b/board/spacemit/k3/Kconfig > > @@ -0,0 +1,30 @@ > > +# SPDX-License-Identifier: GPL-2.0-or-later > > +# > > +# Copyright (C) 2026 Yixun Lan <[email protected]> > > + > > +if TARGET_SPACEMIT_K3 > > + > > +config SYS_BOARD > > + default "k3" > > + > > +config SYS_VENDOR > > + default "spacemit" > > + > > +config SYS_CPU > > + default "k3" > > + > > +config SYS_CONFIG_NAME > > + default "k3" > > + > > +config TEXT_BASE > > + default 0x102000000 > > + > > +config SPL_OPENSBI_LOAD_ADDR > > + hex > > + default 0x100000000 > > + > > +config BOARD_SPECIFIC_OPTIONS > > + def_bool y > > + select SPACEMIT_K3 > > + > > +endif > > diff --git a/board/spacemit/k3/MAINTAINERS b/board/spacemit/k3/MAINTAINERS > > new file mode 100644 > > index 00000000000..34cf1ed4453 > > --- /dev/null > > +++ b/board/spacemit/k3/MAINTAINERS > > @@ -0,0 +1,8 @@ > > +SPACEMIT K3 > > +M: Yixun Lan <[email protected]> > > +S: Maintained > > +F: arch/riscv/cpu/k3/ > > +F: board/spacemit/k3/ > > +F: configs/spacemit_k3_defconfig > > +F: include/configs/k3.h > > +F: arch/riscv/dts/k3-u-boot.dtsi > > diff --git a/include/configs/k3.h b/include/configs/k3.h > > new file mode 100644 > > index 00000000000..83e4945d2b3 > > --- /dev/null > > +++ b/include/configs/k3.h > > @@ -0,0 +1,13 @@ > > +/* SPDX-License-Identifier: GPL-2.0-or-later */ > > +/* > > + * Copyright (C) 2026 Yixun Lan <[email protected]> > > + */ > > + > > +#ifndef __CONFIG_H > > +#define __CONFIG_H > > + > > +#define CFG_SYS_NS16550_IER 0x40 > > + > > +#define RISCV_SMODE_TIMER_FREQ 24000000 > > + > > +#endif /* __CONFIG_H */ > > > > There is a Texas Instruments K3 SoC referred to as "k3" in u-boot > discussion. Let's not add to the confusion here on a global include file > that is named "configs/k3.h" > > Please rename "include/configs/k3.h" as "include/configs/spacemit-k3.h" > or "include/configs/spacemit_k3.h" to be consistent with the target > defconfig name. "k1.h" global config header name may be renamed later > when development pace slows that it would not be too disruptive, and to > follow whatever hyphen or underscore delineation is decided for K3. > make sense, I will pick "spacemit-k3.h" as the config file name
-- Yixun Lan (dlan)
