From: Petr Hodina <[email protected]>

Add the UFS_DEVICE_QUIRK_EXTEND_SYNC_LENGTH bit. SK Hynix UFS devices
on the Sony Yoshino/Tama (MSM8998 / SDM845) family need
PA_TxHsG{1,2,3}SyncLength programmed to 0x48 before the power-mode
change for a reliable HS link; without it link bring-up fails or the
device falls back to a slow PWM mode.

Signed-off-by: Petr Hodina <[email protected]>
---
 drivers/ufs/ufs-uclass.c | 9 +++++++++
 drivers/ufs/ufs_quirks.h | 7 +++++++
 drivers/ufs/unipro.h     | 3 +++
 3 files changed, 19 insertions(+)

diff --git a/drivers/ufs/ufs-uclass.c b/drivers/ufs/ufs-uclass.c
index 05b95c510b4..fdf62a69c02 100644
--- a/drivers/ufs/ufs-uclass.c
+++ b/drivers/ufs/ufs-uclass.c
@@ -1872,6 +1872,9 @@ out:
  * fw revision; UFS_ANY_VENDOR / UFS_ANY_MODEL / UFS_ANY_VER act as wildcards.
  */
 static const struct ufs_dev_quirk ufs_fixups[] = {
+       /* SK Hynix devices need an extended HS sync length */
+       UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
+               UFS_DEVICE_QUIRK_EXTEND_SYNC_LENGTH),
        /* Sony Yoshino/Tama: block PURGE/UNMAP to avoid bricking */
        UFS_FIX_REVISION(UFS_VENDOR_SKHYNIX, UFS_MODEL_HYNIX_32GB,
                         UFS_REVISION_HYNIX, UFS_DEVICE_QUIRK_NO_PURGE),
@@ -2108,6 +2111,12 @@ static int ufshcd_change_power_mode(struct ufs_hba *hba,
                ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
                               pwr_mode->hs_rate);
 
+       if (hba->dev_quirks & UFS_DEVICE_QUIRK_EXTEND_SYNC_LENGTH) {
+               ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TxHsG1SyncLength), 0x48);
+               ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TxHsG2SyncLength), 0x48);
+               ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TxHsG3SyncLength), 0x48);
+       }
+
        ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4 |
                                         pwr_mode->pwr_tx);
 
diff --git a/drivers/ufs/ufs_quirks.h b/drivers/ufs/ufs_quirks.h
index f5aa47722db..822315cb06d 100644
--- a/drivers/ufs/ufs_quirks.h
+++ b/drivers/ufs/ufs_quirks.h
@@ -84,4 +84,11 @@ struct ufs_dev_quirk {
  */
 #define UFS_DEVICE_QUIRK_NO_PURGE              BIT(0)
 
+/*
+ * Some SK Hynix devices on Sony Yoshino/Tama need an extended HS sync length
+ * (PA_TxHsG{1,2,3}SyncLength) programmed before the power-mode change for a
+ * reliable HS link.
+ */
+#define UFS_DEVICE_QUIRK_EXTEND_SYNC_LENGTH    BIT(1)
+
 #endif /* _UFS_QUIRKS_H */
diff --git a/drivers/ufs/unipro.h b/drivers/ufs/unipro.h
index bde1490397c..4e163da0736 100644
--- a/drivers/ufs/unipro.h
+++ b/drivers/ufs/unipro.h
@@ -118,6 +118,9 @@
 #define PA_TXGEAR              0x1568
 #define PA_TXTERMINATION       0x1569
 #define PA_HSSERIES            0x156A
+#define PA_TxHsG1SyncLength    0x1552
+#define PA_TxHsG2SyncLength    0x1554
+#define PA_TxHsG3SyncLength    0x1556
 #define PA_LEGACYDPHYESCDL     0x1570
 #define PA_PWRMODE             0x1571
 #define PA_ACTIVERXDATALANES   0x1580

-- 
2.55.0


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