On Tue, Oct 06, 2026 at 11:45:08PM +0800, Zhuxu Ran wrote:
> The CV1800B system reset driver uses hard-coded RTC register
> addresses. Initialize a register map from the RTC node shared with
> its parent device instead, and propagate register access errors.
> Require the RTC driver that binds the sysreset child. Preserve the
> existing reset requests, including the warm-reset sequence used for
> SYSRESET_COLD.
>
> Signed-off-by: Zhuxu Ran <[email protected]>
> ---
> drivers/sysreset/Kconfig | 6 ++-
> drivers/sysreset/sysreset_cv1800b.c | 90
> +++++++++++++++++++++++--------------
> 2 files changed, 60 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
> index 16ef434a8d9..c9f2a552b47 100644
> --- a/drivers/sysreset/Kconfig
> +++ b/drivers/sysreset/Kconfig
> @@ -60,9 +60,11 @@ config SYSRESET_CMD_POWEROFF
> endif
>
> config SYSRESET_CV1800B
> - bool "Enable support for Sophgo cv1800b System Reset"
> + bool "Enable support for Sophgo CV1800B system reset"
> + depends on RTC_CV1800B
> help
> - Enable system reset support for Sophgo cv1800b SoC.
> + Enable system reset and power control through the RTC subsystem
> + found on Sophgo CV1800 series SoCs.
>
> config POWEROFF_GPIO
> bool "Enable support for GPIO poweroff driver"
> diff --git a/drivers/sysreset/sysreset_cv1800b.c
> b/drivers/sysreset/sysreset_cv1800b.c
> index 9cd62772ef4..fa76c8cf38e 100644
> --- a/drivers/sysreset/sysreset_cv1800b.c
> +++ b/drivers/sysreset/sysreset_cv1800b.c
> @@ -1,64 +1,86 @@
> // SPDX-License-Identifier: GPL-2.0
> /*
> * Copyright (c) 2024, Kongyang Liu <[email protected]>
> + * Copyright (c) 2026, Zhuxu Ran <[email protected]>
> */
>
> #include <dm.h>
> -#include <stdbool.h>
> +#include <regmap.h>
> #include <sysreset.h>
> -#include <wait_bit.h>
> -#include <linux/io.h>
> +#include <linux/bitops.h>
> +#include <linux/err.h>
> #include <linux/errno.h>
>
> -#define REG_RTC_BASE (void *)0x05026000
> -#define REG_RTC_CTRL_BASE (void *)0x05025000
> -#define REG_RTC_EN_SHDN_REQ (REG_RTC_BASE + 0xc0)
> -#define REG_RTC_EN_PWR_CYC_REQ (REG_RTC_BASE + 0xc8)
> -#define REG_RTC_EN_WARM_RST_REQ (REG_RTC_BASE + 0xcc)
> -#define REG_RTC_CTRL_UNLOCKKEY (REG_RTC_CTRL_BASE + 0x4)
> -#define REG_RTC_CTRL (REG_RTC_CTRL_BASE + 0x8)
> +#define RTC_CTRL_UNLOCKKEY 0x0004
> +#define RTC_CTRL 0x0008
> +#define RTC_EN_SHDN_REQ 0x10c0
Looks like the tabs for 0x10c0 are not correct.
> +#define RTC_EN_PWR_CYC_REQ 0x10c8
> +#define RTC_EN_WARM_RST_REQ 0x10cc
>
> -#define CTRL_UNLOCKKEY_MAGIC 0xAB18
> +#define CTRL_UNLOCKKEY_MAGIC 0xab18
This line change is purely cosmetic. I think it is fine since you are
changing all the other addresses, but I just wanted to highligth it.
>
> -/* REG_RTC_CTRL */
> -#define BIT_REQ_SHDN BIT(0)
> -#define BIT_REQ_PWR_CYC BIT(3)
> -#define BIT_REQ_WARM_RST BIT(4)
> +#define BIT_REQ_SHDN BIT(0)
> +#define BIT_REQ_PWR_CYC BIT(3)
Same here, looks like the tabs for BIT(3) are not correct.
> +#define BIT_REQ_WARM_RST BIT(4)
>
> -static struct {
> - void *pre_req_reg;
> +struct cv1800b_sysreset_priv {
> + struct regmap *regmap;
> +};
> +
> +static const struct {
> + u32 pre_req_reg;
> u32 req_bit;
> } reset_info[SYSRESET_COUNT] = {
> - [SYSRESET_WARM] = { REG_RTC_EN_WARM_RST_REQ, BIT_REQ_WARM_RST },
> - [SYSRESET_COLD] = { REG_RTC_EN_WARM_RST_REQ, BIT_REQ_WARM_RST },
> - [SYSRESET_POWER] = { REG_RTC_EN_PWR_CYC_REQ, BIT_REQ_PWR_CYC },
> - [SYSRESET_POWER_OFF] = { REG_RTC_EN_SHDN_REQ, BIT_REQ_SHDN },
> + [SYSRESET_WARM] = { RTC_EN_WARM_RST_REQ, BIT_REQ_WARM_RST },
> + [SYSRESET_COLD] = { RTC_EN_WARM_RST_REQ, BIT_REQ_WARM_RST },
> + [SYSRESET_POWER] = { RTC_EN_PWR_CYC_REQ, BIT_REQ_PWR_CYC },
> + [SYSRESET_POWER_OFF] = { RTC_EN_SHDN_REQ, BIT_REQ_SHDN },
> };
>
> static int cv1800b_sysreset_request(struct udevice *dev, enum sysreset_t
> type)
> {
> - u32 reg;
> + struct cv1800b_sysreset_priv *priv = dev_get_priv(dev);
> + int ret;
> +
> + if (type >= SYSRESET_COUNT)
> + return -EINVAL;
>
> - writel(1, reset_info[type].pre_req_reg);
> - writel(CTRL_UNLOCKKEY_MAGIC, REG_RTC_CTRL_UNLOCKKEY);
> - reg = readl(REG_RTC_CTRL);
> - writel(0xFFFF0800 | reset_info[type].req_bit, REG_RTC_CTRL);
> + ret = regmap_write(priv->regmap, reset_info[type].pre_req_reg, 1);
> + if (ret)
> + return ret;
> +
> + ret = regmap_write(priv->regmap, RTC_CTRL_UNLOCKKEY,
> + CTRL_UNLOCKKEY_MAGIC);
> + if (ret)
> + return ret;
> +
> + ret = regmap_write(priv->regmap, RTC_CTRL,
> + 0xffff0800 | reset_info[type].req_bit);
> + if (ret)
> + return ret;
>
> return -EINPROGRESS;
> }
>
> +static int cv1800b_sysreset_probe(struct udevice *dev)
> +{
> + struct cv1800b_sysreset_priv *priv = dev_get_priv(dev);
> +
> + priv->regmap = devm_regmap_init(dev, NULL, NULL, NULL);
> + if (IS_ERR(priv->regmap))
> + return PTR_ERR(priv->regmap);
> +
> + return 0;
> +}
> +
> static struct sysreset_ops cv1800b_sysreset = {
> .request = cv1800b_sysreset_request,
> };
>
> -static const struct udevice_id cv1800b_sysreset_ids[] = {
> - { .compatible = "sophgo,cv1800b-sysreset", },
> - {},
> -};
> -
> U_BOOT_DRIVER(sysreset_cv1800b) = {
> .name = "cv1800b_sysreset",
> - .id = UCLASS_SYSRESET,
> - .ops = &cv1800b_sysreset,
> - .of_match = cv1800b_sysreset_ids
> + .id = UCLASS_SYSRESET,
> + .probe = cv1800b_sysreset_probe,
> + .ops = &cv1800b_sysreset,
> + .priv_auto = sizeof(struct cv1800b_sysreset_priv),
> };
>
> --
> 2.55.0
>
Best regards,
--
Hiago
