On 10-10-2026 12:44, Yixun Lan wrote:
Hi Dave,
On 18:11 Mon 05 Oct , Dave Klotz wrote:
When the probe fails, the driver releases its clock and reset bulks.
clk_release_bulk() disables every clock and reset_release_bulk()
asserts every reset, and the first entry of each is the SDH AXI bus
clock and reset, which all three SDHCI controllers of the K1 share.
One controller failing to probe therefore stops the bus of the others,
and the next register access to any of them hangs the hart. On an
OrangePi RV2, whose device tree enables the eMMC controller without a
max-frequency, the eMMC probe failed in sdhci_setup_cfg() and U-Boot
then hung at "MMC:" probing the microSD controller.
Keep the clocks running and the resets deasserted on failure.
For the clock part:
This doesn't make sense to me, but I've not put my hands on board to
test and actually replicate the case myself..
It occur to me the clk driver should take care of the consumers and
only disable the clock once 'enable_count' drop to zero, see
https://git.u-boot-project.org/u-boot/custodians/u-boot-spacemit/-/blob/main/drivers/clk/clk-uclass.c?ref_type=heads#L744
For the reset part:
As I checked the code, it seems exactly match what you described here,
where there is no enable count tracking mechanism, so release() will
trigger an assert() operation in hardware layer
so, would this issue only relate to reset?
Given Dlan’s finding, I would withdraw the Reviewed-by pending that
test or a narrower reset-only revision.
