On Mon, Sep 28, 2026 at 02:06:53PM -0400, Tyler Baker wrote: > Add a configuration fragment and memory map for the Arduino VENTUNO Q > (QCS8275), running U-Boot after TF-A and OP-TEE. > > Boot on a Cortex-A55 and exclude memory reserved by the boot firmware > from the RAM map. > > Assisted-by: Claude:claude-opus-5-5 > Signed-off-by: Tyler Baker <[email protected]> > --- > Changes in v2: > - Renamed from "board: qualcomm: add Arduino VENTUNO Q config fragment". > - Reworded the commit message and comments. > --- > arch/arm/dts/monaco-arduino-monza-u-boot.dtsi | 26 ++++++++++++++++++++++++++ > board/qualcomm/arduino-ventuno-q.config | 5 +++++ > 2 files changed, 31 insertions(+) > > diff --git a/arch/arm/dts/monaco-arduino-monza-u-boot.dtsi > b/arch/arm/dts/monaco-arduino-monza-u-boot.dtsi > new file mode 100644 > index 0000000000..e6ba8ba486 > --- /dev/null > +++ b/arch/arm/dts/monaco-arduino-monza-u-boot.dtsi > @@ -0,0 +1,26 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +/ { > + /* > + * Boot firmware regions left out: > + * 0x80000000 SAIL > + * 0x908c0000 DDR training > + * 0x90c00000 SAIL mailbox and OTA > + * 0xd0100000 TZ carveouts and DBI dump > + * 0xdb100000 TZ statistics > + * 0xdb200000 CPUCP > + */ > + memory@80000000 { > + device_type = "memory"; > + reg = <0x0 0x90000000 0x0 0x008c0000>, > + <0x0 0x908c1000 0x0 0x0033f000>, > + <0x0 0x91100000 0x0 0x3f000000>, > + <0x0 0xd4400000 0x0 0x06d00000>, > + <0x0 0xdb300000 0x0 0x24d00000>, > + <0xa 0x00000000 0x2 0x00000000>, > + <0xe 0x00000000 0x1 0x80000000>; > + }; > +}; > diff --git a/board/qualcomm/arduino-ventuno-q.config > b/board/qualcomm/arduino-ventuno-q.config > new file mode 100644 > index 0000000000..a8041cbe9d > --- /dev/null > +++ b/board/qualcomm/arduino-ventuno-q.config > @@ -0,0 +1,5 @@ > +# Arduino VENTUNO Q; use with qcom_defconfig and tfa-optee.config. > +CONFIG_DEFAULT_DEVICE_TREE="qcom/monaco-arduino-monza" > +CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y > +CONFIG_BOOT0_QCOM_BOOT_CPU=y > +CONFIG_QCOM_BOOT_CPU_MPIDR=0x10000 >
IIUC, Linux makes CPU with MPIDR ~= 0x10000 as CPU#0. This is conflicting with the `reg` mentioned at https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/qcom/monaco.dtsi#n53 Do we see any issues with that? Also, what would be CPU#1 in Linux? of_parse_and_init_cpus() indicates that CPUs are enumerated in the order mentioned at cpus { } which means physical CPU#0 becomes logical CPU#1. One immediate side effect of this is that `capacity-dmips-mhz` value will go wrong which can result in suboptimal scheduler / cpufreq decisions. Do you plan to patch the Linux DT as well when this change is enabled in u-boot / bootloader? Thanks, Pavan
