[PATCH v2 2/4] clk: rockchip: rk3588: Always initialize clocks in SPL

[Jonas Karlman]

The RK3588 clock driver configures the CPU PLLs and SPLL when probed in
SPL. However, the driver is only probed on demand, so this
configuration is skipped when no SPL consumer requests a clock, e.g.
when booting from RAM/USB.

Prior to the commit c6bba31dbdd4 ("rockchip: spl-boot-order: Defer probe
of boot device") all boot devices where typically probed, with a side
effect that clock driver likely also where probed, prior to the
boot_from_devices() call.

Flag the clock driver to be probed after bind in SPL to help ensure a
deterministic probe and clock configuration behavior prior to booting
from devices.

Signed-off-by: Jonas Karlman <jo...@kwiboo.se>
Tested-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v2:
- Update commit message
- Collect t-b tag
---
 drivers/clk/rockchip/clk_rk3588.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/clk/rockchip/clk_rk3588.c 
b/drivers/clk/rockchip/clk_rk3588.c
index 9e26ca669fc5..fe3fc695c15f 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -2004,6 +2004,10 @@ static int rk3588_clk_bind(struct udevice *dev)
        struct udevice *sys_child;
        struct sysreset_reg *priv;
 
+       /* Ensure clocks are initialized after bind in SPL build */
+       if (IS_ENABLED(CONFIG_SPL_BUILD))
+               dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
+
        /* The reset driver does not have a device node, so bind it here */
        ret = device_bind_driver(dev, "rockchip_sysreset", "sysreset",
                                 &sys_child);
@@ -2133,6 +2137,15 @@ static int rk3588_scru_clk_probe(struct udevice *dev)
        return 0;
 }
 
+static int rk3588_scru_clk_bind(struct udevice *dev)
+{
+       /* Ensure clocks are initialized after bind in SPL build */
+       if (IS_ENABLED(CONFIG_SPL_BUILD))
+               dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
+
+       return 0;
+}
+
 static const struct clk_ops rk3588_scru_clk_ops = {
        .get_rate = rk3588_scru_clk_get_rate,
        .set_rate = rk3588_scru_clk_set_rate,
@@ -2142,6 +2155,7 @@ U_BOOT_DRIVER(rockchip_rk3588_scru) = {
        .name   = "rockchip_rk3588_scru",
        .id     = UCLASS_CLK,
        .ops    = &rk3588_scru_clk_ops,
+       .bind   = rk3588_scru_clk_bind,
        .probe  = rk3588_scru_clk_probe,
 };
 
-- 
2.55.0