Hi Jerome The changed code is inside the existing "#ifdef CONFIG_ARCH_NPCM8XX" block in dw_adjust_link() (added by commit 5354774b6b3 "net: designware: Add npcm8xx sgmii pcs support"); the #ifdef line is just outside of the diff context. PCS_BA and the SR_MII_MMD/VR_MII_MMD definitions come from <asm/arch/gmac.h>, which is only included for NPCM8XX, so other platforms using the DesignWare driver are not affected.
Best regards, Jim On Tue, Oct 13, 2026 at 7:57 PM Jerome Forissier <[email protected]> wrote: > > Hi Jim, > > On 14/09/2026 11:16, Jim Liu wrote: > > From: Stanley Chu <[email protected]> > > > > Disable SGMII auto negotiation to avoid link-up timeout on NPCM845. > > > > Signed-off-by: Stanley Chu <[email protected]> > > --- > > drivers/net/designware.c | 33 +++++++++++++++++++++++++-------- > > 1 file changed, 25 insertions(+), 8 deletions(-) > > > > diff --git a/drivers/net/designware.c b/drivers/net/designware.c > > index 6ed9c6d538a..5ff84c13bf9 100644 > > --- a/drivers/net/designware.c > > +++ b/drivers/net/designware.c > > @@ -498,16 +498,33 @@ static int dw_adjust_link(struct dw_eth_dev *priv, > > struct eth_mac_regs *mac_p, > > if (phydev->interface == PHY_INTERFACE_MODE_SGMII) { > > ulong start; > > > > - /* Indirect access to VR_MII_MMD registers */ > > - writew((VR_MII_MMD >> 9), PCS_BA + PCS_IND_AC); > > - /* Set PCS_Mode to SGMII */ > > - clrsetbits_le16(PCS_BA + VR_MII_MMD_AN_CTRL, BIT(1), BIT(2)); > > - /* Set Auto Speed Mode Change */ > > - setbits_le16(PCS_BA + VR_MII_MMD_CTRL1, BIT(9)); > > /* Indirect access to SR_MII_MMD registers */ > > writew((SR_MII_MMD >> 9), PCS_BA + PCS_IND_AC); > > - /* Restart Auto-Negotiation */ > > - setbits_le16(PCS_BA + SR_MII_MMD_CTRL, BIT(9) | BIT(12)); > > + /* Disable SGMII PCS Auto-Negotiation */ > > + clrbits_le16(PCS_BA + SR_MII_MMD_CTRL, BIT(12)); > > + > > + switch (phydev->speed) { > > + case SPEED_1000: > > + /* SR_MII_CTRL.SS6=1 */ > > + setbits_le16(PCS_BA, BIT(6)); > > + /* SR_MII_CTRL.SS13=0 */ > > + clrbits_le16(PCS_BA, BIT(13)); > > + break; > > + case SPEED_100: > > + /* SR_MII_CTRL.SS6=0 */ > > + clrbits_le16(PCS_BA, BIT(6)); > > + /* SR_MII_CTRL.SS13=1 */ > > + setbits_le16(PCS_BA, BIT(13)); > > + break; > > + case SPEED_10: > > + /* SR_MII_CTRL.SS6=0 */ > > + clrbits_le16(PCS_BA, BIT(6)); > > + /* SR_MII_CTRL.SS13=0 */ > > + clrbits_le16(PCS_BA, BIT(13)); > > + break; > > + default: > > + break; > > + } > > > > printf("SGMII PHY Wait for link up \n"); > > /* SGMII PHY Wait for link up */ > > You mention NPCM845 in the commit description, but this applies to all > platforms using the > DesignWare driver. Could it cause regressions? > > Thanks, > -- > Jerome
