Hello Andreas,
On Wed, Oct 14, 2026 at 09:46:44AM +0200, Andreas Henriksson wrote:
> On boards with >3GiB ram, we can end up with transfers above 4GiB
> which is not allowed by SDHC driver.
>
> fsl_esdhc_imx.c: esdhc_setup_dma():
> if (upper_32_bits(priv->dma_addr))
> printf("Cannot use 64 bit addresses with SDMA\n");
[...]
> diff --git a/lib/Kconfig b/lib/Kconfig
> index 021a82d4709..a5f2e3e1058 100644
> --- a/lib/Kconfig
> +++ b/lib/Kconfig
> @@ -1371,7 +1371,7 @@ config SPL_LMB_ARCH_MEM_MAP
> config LMB_LIMIT_DMA_BELOW_RAM_TOP
> bool
> depends on LMB
> - default y if ARCH_BCM283X || ARCH_MVEBU || ARCH_ROCKCHIP ||
> STARFIVE_JH7110
> + default y if ARCH_BCM283X || ARCH_IMX8M || ARCH_MVEBU || ARCH_ROCKCHIP
> || STARFIVE_JH7110
> help
> Some architectures can not DMA above ram_top boundary,
> which is after 4 GiB or 32-bit boundary too. Limit the
Is this specific of imx8m? This driver is likely used by other i.MX
platforms.
Francesco
