From: Ye Li <[email protected]>

To enable icache and dcache in SPL, add the definition of secure DDR
space which could be accessed by SPL and move arch_cpu_init before
spl_early_init.

Signed-off-by: Ye Li <[email protected]>
---
Changes in v2:
 - Change spaces to tabs in #defines 

 board/toradex/aquila-imx95/spl.c      | 4 ++--
 board/toradex/smarc-imx95/spl.c       | 4 ++--
 board/toradex/verdin-imx95/spl.c      | 4 ++--
 include/configs/aquila-imx95.h        | 2 +-
 include/configs/toradex-smarc-imx95.h | 3 +++
 include/configs/verdin-imx95.h        | 3 +++
 6 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/board/toradex/aquila-imx95/spl.c b/board/toradex/aquila-imx95/spl.c
index 93e76be6145..31730fc22c8 100644
--- a/board/toradex/aquila-imx95/spl.c
+++ b/board/toradex/aquila-imx95/spl.c
@@ -58,6 +58,8 @@ void board_init_f(ulong dummy)
 
        timer_init();
 
+       arch_cpu_init();
+
        /* Need dm_init() to run before any SCMI calls */
        spl_early_init();
 
@@ -66,8 +68,6 @@ void board_init_f(ulong dummy)
        if (ret)
                hang(); /* MU not probed, nothing can be outputed, hang */
 
-       arch_cpu_init();
-
        preloader_console_init();
 
        debug("SOC: 0x%x\n", gd->arch.soc_rev);
diff --git a/board/toradex/smarc-imx95/spl.c b/board/toradex/smarc-imx95/spl.c
index aebb4a2f0b6..a3fd11a50db 100644
--- a/board/toradex/smarc-imx95/spl.c
+++ b/board/toradex/smarc-imx95/spl.c
@@ -99,6 +99,8 @@ void board_init_f(ulong dummy)
 
        timer_init();
 
+       arch_cpu_init();
+
        /* Need dm_init() to run before any SCMI calls */
        spl_early_init();
 
@@ -107,8 +109,6 @@ void board_init_f(ulong dummy)
        if (ret)
                hang(); /* MU not probed, nothing can be outputed, hang */
 
-       arch_cpu_init();
-
        preloader_console_init();
 
        debug("SOC: 0x%x\n", gd->arch.soc_rev);
diff --git a/board/toradex/verdin-imx95/spl.c b/board/toradex/verdin-imx95/spl.c
index 93e76be6145..31730fc22c8 100644
--- a/board/toradex/verdin-imx95/spl.c
+++ b/board/toradex/verdin-imx95/spl.c
@@ -58,6 +58,8 @@ void board_init_f(ulong dummy)
 
        timer_init();
 
+       arch_cpu_init();
+
        /* Need dm_init() to run before any SCMI calls */
        spl_early_init();
 
@@ -66,8 +68,6 @@ void board_init_f(ulong dummy)
        if (ret)
                hang(); /* MU not probed, nothing can be outputed, hang */
 
-       arch_cpu_init();
-
        preloader_console_init();
 
        debug("SOC: 0x%x\n", gd->arch.soc_rev);
diff --git a/include/configs/aquila-imx95.h b/include/configs/aquila-imx95.h
index 96c11ff2d5b..9c48d2b2736 100644
--- a/include/configs/aquila-imx95.h
+++ b/include/configs/aquila-imx95.h
@@ -26,6 +26,6 @@
 #define PHYS_SDRAM_2_SIZE      SZ_6G
 
 #define CFG_SYS_SECURE_SDRAM_BASE      0x8A000000 /* Secure DDR region for 
A55, SPL could use first 2MB */
-#define CFG_SYS_SECURE_SDRAM_SIZE      0x06000000
+#define CFG_SYS_SECURE_SDRAM_SIZE      SZ_64M
 
 #endif
diff --git a/include/configs/toradex-smarc-imx95.h 
b/include/configs/toradex-smarc-imx95.h
index 97e3322ac28..77af630f5a1 100644
--- a/include/configs/toradex-smarc-imx95.h
+++ b/include/configs/toradex-smarc-imx95.h
@@ -22,4 +22,7 @@
 #define PHYS_SDRAM_SIZE                (SZ_2G - PHYS_SDRAM_FW_RSVD)
 #define PHYS_SDRAM_2_SIZE      SZ_6G
 
+#define CFG_SYS_SECURE_SDRAM_BASE      0x8A000000 /* Secure DDR region for A55 
*/
+#define CFG_SYS_SECURE_SDRAM_SIZE      SZ_64M
+
 #endif
diff --git a/include/configs/verdin-imx95.h b/include/configs/verdin-imx95.h
index b6df4d48695..98fc6f3757f 100644
--- a/include/configs/verdin-imx95.h
+++ b/include/configs/verdin-imx95.h
@@ -22,4 +22,7 @@
 #define PHYS_SDRAM_SIZE                (SZ_2G - PHYS_SDRAM_FW_RSVD)
 #define PHYS_SDRAM_2_SIZE      SZ_30G
 
+#define CFG_SYS_SECURE_SDRAM_BASE      0x8A000000 /* Secure DDR region for A55 
*/
+#define CFG_SYS_SECURE_SDRAM_SIZE      SZ_64M
+
 #endif
-- 
2.50.1

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