On Wed, Oct 21, 2026 at 04:14:42PM -0500, Anirudh Srinivasan wrote: > Hello Tom, > > On Wed, Oct 21, 2026 at 3:57 PM Tom Rini <[email protected]> wrote: > > > > On Mon, Aug 03, 2026 at 02:00:35PM -0500, Anirudh Srinivasan via U-Boot > > wrote: > > > > > The designware spi driver doesn't support dual/quad/octal modes, but > > > the driver still tries using these modes when it sees a capable flash > > > chip in the devicetree. Add a supports_op function to this driver to > > > prevent this from happening and force single lane operation. > > > > > > Signed-off-by: Anirudh Srinivasan <[email protected]> > > > > This introduces a failure to build: > > +(socfpga_secu1) arm-linux-gnueabi-ld: drivers/spi/designware_spi.o: in > > function `dw_spi_supports_op': > > +(socfpga_secu1) > > drivers/spi/designware_spi.c:707:(.text.dw_spi_supports_op+0x18): undefined > > reference to `spi_mem_default_supports_op' > > +(socfpga_secu1) make[1]: *** [Makefile:2131: u-boot] Error 1 > > +(socfpga_secu1) make: *** [Makefile:189: __sub-make] Error 2 > > Thanks for catching this. I think the solution would be for > DESIGNWARE_SPI to select SPI_MEM. Other spi drivers that call this > function also do this (nxp_xspi, spi-aspeed-smc, cadence_qspi....). > > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig > index cfbedd64c4c..a5623a2cec6 100644 > --- a/drivers/spi/Kconfig > +++ b/drivers/spi/Kconfig > @@ -222,6 +222,7 @@ config DAVINCI_SPI > > config DESIGNWARE_SPI > bool "Designware SPI driver" > + select SPI_MEM > help > Enable the Designware SPI driver. This driver can be used to > access the SPI NOR flash on platforms embedding this Designware > > > I will send a v2 with this fixed.
Yes, and please have that in its own patch as a bugfix. Thanks! -- Tom
signature.asc
Description: PGP signature
