Drop the trace calls from io.h and bring back dwc3_flush_cache() and
dwc3_invalidate_cache() from the old io.h. The gadget code uses them.

Drop the linux-compat.h include from dwc3-omap.c and ti_usb_phy.c. The
restore commit removed that file.

Keep the U-Boot Makefile. The kernel one lists files we do not import,
like dwc3-qcom.c, host.c and drd.c.

Co-developed-by: Jerome Forissier <[email protected]>
Signed-off-by: Jerome Forissier <[email protected]>
Co-developed-by: Jens Wiklander <[email protected]>
Signed-off-by: Jens Wiklander <[email protected]>
Signed-off-by: Anders Roxell <[email protected]>
---
 drivers/usb/dwc3/Makefile     | 16 +++++++++++-----
 drivers/usb/dwc3/dwc3-omap.c  |  2 --
 drivers/usb/dwc3/io.h         | 36 ++++++++++++++++++-----------------
 drivers/usb/dwc3/ti_usb_phy.c |  2 --
 4 files changed, 30 insertions(+), 26 deletions(-)

diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index a619cd374fb4..a5775c4bea04 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -3,16 +3,22 @@
 obj-$(CONFIG_USB_DWC3)                 += dwc3.o
 
 dwc3-y                                 := core.o
+dwc3-$(CONFIG_USB_DWC3_GADGET)         += gadget.o ep0.o
 
-obj-$(CONFIG_USB_DWC3_GADGET)          += gadget.o ep0.o
+##
+# Platform-specific glue layers go here
+#
+# NOTICE: Make sure your glue layer doesn't depend on anything
+# which is arch-specific and that it compiles on all situations.
+##
 
 obj-$(CONFIG_$(PHASE_)USB_DWC3_AM62)   += dwc3-am62.o
-obj-$(CONFIG_USB_DWC3_OMAP)            += dwc3-omap.o
+obj-$(CONFIG_$(PHASE_)USB_DWC3_GENERIC)        += dwc3-generic.o
+obj-$(CONFIG_USB_DWC3_LAYERSCAPE)      += dwc3-layerscape.o
 obj-$(CONFIG_USB_DWC3_MESON_G12A)      += dwc3-meson-g12a.o
 obj-$(CONFIG_USB_DWC3_MESON_GXL)       += dwc3-meson-gxl.o
-obj-$(CONFIG_$(PHASE_)USB_DWC3_GENERIC)                += dwc3-generic.o
+obj-$(CONFIG_USB_DWC3_OMAP)            += dwc3-omap.o
+obj-$(CONFIG_USB_DWC3_STI)             += dwc3-generic-sti.o
 obj-$(CONFIG_USB_DWC3_UNIPHIER)                += dwc3-uniphier.o
-obj-$(CONFIG_USB_DWC3_LAYERSCAPE)      += dwc3-layerscape.o
 obj-$(CONFIG_USB_DWC3_PHY_OMAP)                += ti_usb_phy.o
 obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG)     += samsung_usb_phy.o
-obj-$(CONFIG_USB_DWC3_STI)             += dwc3-generic-sti.o
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index 4b219c35eb35..9de8ecff3adc 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -25,8 +25,6 @@
 #include <linux/usb/otg.h>
 #include <linux/compat.h>
 
-#include "linux-compat.h"
-
 /*
  * All these registers belong to OMAP's Wrapper around the
  * DesignWare USB3 Core.
diff --git a/drivers/usb/dwc3/io.h b/drivers/usb/dwc3/io.h
index 1e96ea339d48..23bf1f1b43a5 100644
--- a/drivers/usb/dwc3/io.h
+++ b/drivers/usb/dwc3/io.h
@@ -11,10 +11,10 @@
 #ifndef __DRIVERS_USB_DWC3_IO_H
 #define __DRIVERS_USB_DWC3_IO_H
 
-#include <linux/io.h>
-#include "trace.h"
-#include "debug.h"
-#include "core.h"
+#include <asm/io.h>
+#include <cpu_func.h>
+
+#define CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
 
 static inline u32 dwc3_readl(void __iomem *base, u32 offset)
 {
@@ -27,13 +27,6 @@ static inline u32 dwc3_readl(void __iomem *base, u32 offset)
         */
        value = readl(base + offset - DWC3_GLOBALS_REGS_START);
 
-       /*
-        * When tracing we want to make it easy to find the correct address on
-        * documentation, so we revert it back to the proper addresses, the
-        * same way they are described on SNPS documentation
-        */
-       trace_dwc3_readl(base - DWC3_GLOBALS_REGS_START, offset, value);
-
        return value;
 }
 
@@ -45,13 +38,22 @@ static inline void dwc3_writel(void __iomem *base, u32 
offset, u32 value)
         * However, the offsets are given starting from xHCI address space.
         */
        writel(value, base + offset - DWC3_GLOBALS_REGS_START);
+}
 
-       /*
-        * When tracing we want to make it easy to find the correct address on
-        * documentation, so we revert it back to the proper addresses, the
-        * same way they are described on SNPS documentation
-        */
-       trace_dwc3_writel(base - DWC3_GLOBALS_REGS_START, offset, value);
+static inline void dwc3_flush_cache(uintptr_t addr, int length)
+{
+       uintptr_t start_addr = (uintptr_t)addr & ~(CACHELINE_SIZE - 1);
+       uintptr_t end_addr = ALIGN((uintptr_t)addr + length, CACHELINE_SIZE);
+
+       flush_dcache_range((unsigned long)start_addr, (unsigned long)end_addr);
+}
+
+static inline void dwc3_invalidate_cache(uintptr_t addr, int length)
+{
+       uintptr_t start_addr = (uintptr_t)addr & ~(CACHELINE_SIZE - 1);
+       uintptr_t end_addr = ALIGN((uintptr_t)addr + length, CACHELINE_SIZE);
+
+       invalidate_dcache_range((unsigned long)start_addr, (unsigned 
long)end_addr);
 }
 
 #endif /* __DRIVERS_USB_DWC3_IO_H */
diff --git a/drivers/usb/dwc3/ti_usb_phy.c b/drivers/usb/dwc3/ti_usb_phy.c
index f0ecdea958ae..f1ddc0086945 100644
--- a/drivers/usb/dwc3/ti_usb_phy.c
+++ b/drivers/usb/dwc3/ti_usb_phy.c
@@ -27,8 +27,6 @@
 #include <asm/arch/sys_proto.h>
 #include <dm.h>
 
-#include "linux-compat.h"
-
 #define PLL_STATUS             0x00000004
 #define PLL_GO                 0x00000008
 #define PLL_CONFIGURATION1     0x0000000C
-- 
2.53.0

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