Since commit ee0fbf4ef766 ("arch: cache: cp15: Add
mmu_set_region_dcache_behaviour() when SYS_DCACHE_OFF is enable"),
mmu_set_region_dcache_behaviour() sits outside the CONFIG_SYS_ARM_MMU
block and calls mmu_set_region_dcache_behaviour_phys(), which only
exists inside it. On cores with an MPU, such as the Cortex-R5 of the K3
SoCs, the call is a dangling reference. It only links because
-ffunction-sections puts the unused function in a section of its own,
which --gc-sections drops. cache-cp15.o is built without LTO, so LTO
cannot drop it instead.
Without -ffunction-sections, as the LTO conditions in arch/arm/config.mk
intend, the K3 R5 builds fail to link:
arch/arm/lib/cache-cp15.c:331: undefined reference to
`mmu_set_region_dcache_behaviour_phys'
Define the function for the D-cache on only when CONFIG_SYS_ARM_MMU is
set, as before that commit. A caller on an MPU core then still fails to
link. An IS_ENABLED() check would instead make the function silently
ignore a request for an uncached region there.
Fixes: ee0fbf4ef766 ("arch: cache: cp15: Add mmu_set_region_dcache_behaviour()
when SYS_DCACHE_OFF is enable")
Reported-by: Tom Rini <[email protected]>
Closes: https://lore.kernel.org/u-boot/20261020212819.GK720525@bill-the-cat/
Signed-off-by: Josef Schlehofer <[email protected]>
---
arch/arm/lib/cache-cp15.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 28bb6fd36c8..e0922320217 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -325,9 +325,11 @@ int dcache_status(void)
return (get_cr() & CR_C) != 0;
}
+#ifdef CONFIG_SYS_ARM_MMU
void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
enum dcache_option option)
{
mmu_set_region_dcache_behaviour_phys(start, start, size, option);
}
+#endif /* CONFIG_SYS_ARM_MMU */
#endif
--
2.54.0 (Apple Git-157)
