The PHY AC remapping tables compensate for the drive strength of the DRAM chips connected to the SoC. This compensation must be skipped when the DRAM is integrated on-die.
Signed-off-by: Indrek Kruusa <[email protected]> --- drivers/ram/sunxi/dram_sun20i_d1.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/ram/sunxi/dram_sun20i_d1.c b/drivers/ram/sunxi/dram_sun20i_d1.c index f098329e891..2d81e58071c 100644 --- a/drivers/ram/sunxi/dram_sun20i_d1.c +++ b/drivers/ram/sunxi/dram_sun20i_d1.c @@ -690,8 +690,13 @@ static void mctl_phy_ac_remapping(const dram_para_t *para, debug("DDR efuse: 0x%x\n", fuse); debug("SoC Chip ID: 0x%08x\n", sid_read_soc_chipid()); - /* No remapping needed on T113-s4 with 256MB co-packaged DRAM */ - if (sid_read_soc_chipid() == SUNXI_CHIPID_T113M4020DC0) + /* + * No remapping needed on the chips with the DRAM die in the package: + * the T113-s4 with 256MB, and the D1s and F133-A. + */ + if (sid_read_soc_chipid() == SUNXI_CHIPID_T113M4020DC0 || + sid_read_soc_chipid() == SUNXI_CHIPID_D1S || + sid_read_soc_chipid() == SUNXI_CHIPID_F133A) return; if (para->dram_type == SUNXI_DRAM_TYPE_DDR2) { -- 2.43.0
