On 10/30/26 3:57 AM, Steffen Dirkwinkel wrote:
> From: Steffen Dirkwinkel <[email protected]>

A couple things in addition to Carlo's comments...

> 
> Running through spl without the dcache is very slow, especially when
> hashing or checking signatures.
> 
> Time from the SPL banner to entering BL31 on an MT8370 module loading a
> 2.7 MB FIT with SHA-256 hashes from SPI NOR, two boots each:
> 
>   FIT                    caches off            caches on
>   unsigned               864.0 / 864.3 ms      95.8 / 95.8 ms
>   RSA-3072 signature     1903.3 / 1903.8 ms    142.0 / 142.0 ms
> 
> Signed-off-by: Steffen Dirkwinkel <[email protected]>
> ---
>  arch/arm/mach-mediatek/mt8188/init.c | 14 ++++++++++++++
>  arch/arm/mach-mediatek/spl.c         |  7 +++++++
>  2 files changed, 21 insertions(+)
> 
> diff --git a/arch/arm/mach-mediatek/mt8188/init.c 
> b/arch/arm/mach-mediatek/mt8188/init.c
> index b2cdec8c2189..2e6aa041c38f 100644
> --- a/arch/arm/mach-mediatek/mt8188/init.c
> +++ b/arch/arm/mach-mediatek/mt8188/init.c
> @@ -6,6 +6,7 @@
>   *         Chris-QJ Chen <[email protected]>
>   */
>  
> +#include <cpu_func.h>
>  #include <asm/global_data.h>
>  #include <asm/system.h>
>  #include <dm/uclass.h>
> @@ -47,3 +48,16 @@ int print_cpuinfo(void)
>       printf("CPU:   MediaTek MT8188\n");
>       return 0;
>  }
> +
> +#if IS_ENABLED(CONFIG_XPL_BUILD) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
> +/* Early page tables, in DRAM unused by SPL and by U-Boot before relocation 
> */
> +#define MT8188_EARLY_TLB_ADDR        0x4e000000
> +
> +/* Initialize the MMU and activate the data cache in SPL */
> +void mtk_spl_enable_caches(void)
> +{
> +     gd->arch.tlb_addr = MT8188_EARLY_TLB_ADDR;
> +     gd->arch.tlb_size = PGTABLE_SIZE;
> +     dcache_enable();

Why not also icache?

> +}
> +#endif
> diff --git a/arch/arm/mach-mediatek/spl.c b/arch/arm/mach-mediatek/spl.c
> index 125ebcd784fe..8073101e3ef6 100644
> --- a/arch/arm/mach-mediatek/spl.c
> +++ b/arch/arm/mach-mediatek/spl.c
> @@ -14,10 +14,17 @@ __weak int mtk_soc_early_init(void)
>       return 0;
>  }
>  
> +__weak void mtk_spl_enable_caches(void)
> +{
> +}

Can we make this a config option instead of a weak function so that we don't
have to implement the same function on every board?

> +
>  void board_init_f(ulong dummy)
>  {
>       int ret;
>  
> +     /* enable caches early */
> +     mtk_spl_enable_caches();
> +
>       ret = spl_early_init();
>       if (ret)
>               hang();
> 

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