Add support for loading the Config/Chip Data Table (CDT) from eMMC during the Shikra SPL boot flow and registering it with QCLIB via the interface table.
Depends on: - https://lore.kernel.org/u-boot/[email protected]/ Changes in v4 - Address Tom's review comments - Add conditional compilation for DDR and CDT related changes Changes in v3 - Address Tom's review comment Changes in v2 - Address Varadarajan's review comment KR Sowmiya (1): cdt: enable CDT for Shikra SPL arch/arm/mach-snapdragon/Kconfig | 73 +++++++++++++++ arch/arm/mach-snapdragon/board_spl.c | 98 +++++++++++++++++++++ arch/arm/mach-snapdragon/include/mach/spl.h | 1 + arch/arm/mach-snapdragon/qclib.c | 8 ++ board/qualcomm/shikra/spl-shikra.c | 10 +++ 5 files changed, 190 insertions(+) -- 2.34.1
