Hi Peter,

On 2026/11/3 17:42, Peter Robinson wrote:
> Hi Frank,
>
> There's a big rebase to sync with upstream Linux driver [1][2], I
> think it's due to land shortly, does the issue still occur with that?
>
> It would be good to get the rockchips SoCs with the dwc3 controller
> tested with that rebase.
>
> Peter
>
> [1] https://lists.u-boot-project.org/pipermail/u-boot/2026-October/637669.html
> [2] https://lists.u-boot-project.org/pipermail/u-boot/2026-October/637734.html

I checked the usb_dwc3_sync_v10 branch referenced in your email, and found no 
code changes related to this issue.

In the Linux kernel driver, getting the dwc->ref_clk rate is mandatory, so this 
issue does not surface. In U-Boot,
however, getting the clock rate is optional. Some platform vendor clock drivers 
do not implement clock rate retrieval
for all clock IDs. Therefore, adding a check for the -ENOENT return value can 
improve code robustness.

Additionally, mainline U-Boot codes do not yet include support for Rockchip 
32-bit SoCs with dwc3 controllers.


Best regards,
Frank

> On Tue, 3 Nov 2026 at 08:28, Frank Wang <[email protected]> wrote:
>> On 32-bit platforms, "usb start" aborted with
>> "### ERROR ### Please RESET the board ###". If the clock driver
>> does not implement the "ref" clock, clk_get_rate() returns
>> -ENOENT, which dwc3_ref_clk_period() treated as a valid rate.
>> period became 0 and the fladj calculation divided by zero; the
>> software 64-bit division on 32-bit ARM calls the
>> division-by-zero handler __div0() and hangs (64-bit platforms
>> survive silently since UDIV returns 0).
>>
>> Skip REFCLKPER/GFLADJ programming when clk_get_rate() returns an
>> error code, as is already done for rate == 0.
>>
>> Fixes: 6bae0eb5b8bd ("usb: dwc3: Calculate REFCLKPER based on reference 
>> clock")
>> Signed-off-by: Frank Wang <[email protected]>
>> ---
>>  drivers/usb/dwc3/core.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index be198041f08..9a84ec6a60e 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -151,7 +151,7 @@ static void dwc3_ref_clk_period(struct dwc3 *dwc)
>>
>>         if (dwc->ref_clk) {
>>                 rate = clk_get_rate(dwc->ref_clk);
>> -               if (!rate)
>> +               if (!rate || IS_ERR_VALUE(rate))
>>                         return;
>>                 period = NSEC_PER_SEC / rate;
>>         } else {
>> --
>> 2.17.1
>>

Reply via email to