On 28.02.2011 17:49, Jani Monoses wrote:
> gcc 4.5 generates the same code as in the assembly - or is it just gcc-4.5
> linaro on natty?
yes.
> Even better it adds a dmb instruction which the asm block is missing, causing
> it to not be SMP safe.
>
> Code generated by default gcc 4.5 on natty.
>
> a: f04f 0201 mov.w r2, #1
> e: f3bf 8f5f dmb sy
> 12: e853 1f00 ldrex r1, [r3]
> 16: 4411 add r1, r2
> 18: e843 1000 strex r0, r1, [r3]
> 1c: f090 0f00 teq r0, #0
> 20: d1f7 bne.n 12 <a+0x12>
what dmart explain on #linaro ;)
<dmart> doko_: I would expect __sync_{add,sub}_and_fetch() to be close in
performance to the inlined asm for v6/v7. __sync_*() also has the needed
barriers -- the libreoffice code I see there doesn't, so it might not always
work correctly in some contexts on true SMP... but maybe the barriers happen
elsewhere
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https://bugs.launchpad.net/bugs/726529
Title:
use arm assembly bits only for gcc < 4.6 on ARM > 6
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