I added the changelog and subscribed the ubuntu-release team, as described in the FreezeExceptionProcess page.
Thanks Micah for your help ** Description changed: version 3.1-8 is already in debian sid [1]. Please sync it for quantal at least + This sync is important because it adds so many new features described here [2] + + LLVM 3.1 includes several major changes and big features: + + AddressSanitizer, a fast memory error detector. + MachineInstr Bundles, Support to model instruction bundling / packing. + ARM Integrated Assembler, A full featured assembler and direct-to-object support for ARM. + Basic Block Placement Probability driven basic block placement. + + LLVM IR and Core Improvements + + LLVM IR has several new features for better support of new targets and + that expose new optimization opportunities: + + A new type representing 16 bit half floating point values has been added. + IR now supports vectors of pointers, including vector GEPs. + Module flags have been introduced. They convey information about the module as a whole to LLVM subsystems. This is currently used to encode Objective C ABI information. + Loads can now have range metadata attached to them to describe the possible values being loaded. + The llvm.ctlz and llvm.cttz intrinsics now have an additional argument which indicates whether the behavior of the intrinsic is undefined on a zero input. This can be used to generate more efficient code on platforms that only have instructions which don't return the type size when counting bits in 0. + + Optimizer Improvements + + In addition to many minor performance tweaks and bug fixes, this release + includes a few major enhancements and additions to the optimizers: + + The loop unroll pass now is able to unroll loops with run-time trip counts. This feature is turned off by default, and is enabled with the -unroll-runtime flag. + A new basic-block autovectorization pass is available. Pass -vectorize to run this pass along with some associated post-vectorization cleanup passes. For more information, see the EuroLLVM 2012 slides: Autovectorization with LLVM. + Inline cost heuristics have been completely overhauled and now closely model constant propagation through call sites, disregard trivially dead code costs, and can model C++ STL iterator patterns. + + MC Level Improvements + + The LLVM Machine Code (aka MC) subsystem was created to solve a number + of problems in the realm of assembly, disassembly, object file format + handling, and a number of other related areas that CPU instruction-set + level tools work in. For more information, please see the Intro to the + LLVM MC Project Blog Post. + + The integrated assembler can optionally emit debug information when + assembling a .s file. It can be enabled by passing the -g option to + llvm-mc. + + Target Independent Code Generator Improvements + + We have changed the way that the Type Legalizer legalizes vectors. The + type legalizer now attempts to promote integer elements. This enabled + the implementation of vector-select. Additionally, we see a performance + boost on workloads which use vectors of chars and shorts, since they are + now promoted to 32-bit types, which are better supported by the SIMD + instruction set. Floating point types are still widened as before. + + We have put a significant amount of work into the code generator + infrastructure, which allows us to implement more aggressive algorithms + and make it run faster: + + TableGen can now synthesize register classes that are only needed to represent combinations of constraints from instructions and sub-registers. The synthetic register classes inherit most of their properties form their closest user-defined super-class. + MachineRegisterInfo now allows the reserved registers to be frozen when register allocation starts. Target hooks should use the MRI->canReserveReg(FramePtr) method to avoid accidentally disabling frame pointer elimination during register allocation. + A new kind of MachineOperand provides a compact representation of large clobber lists on call instructions. The register mask operand references a bit mask of preserved registers. Everything else is clobbered. + The DWARF debug info writer gained support for emitting data for the name accelerator tables DWARF extension. It is used by LLDB to speed up name lookup. + + We added new TableGen infrastructure to support bundling for Very Long + Instruction Word (VLIW) architectures. TableGen can now automatically + generate a deterministic finite automaton from a VLIW target's schedule + description which can be queried to determine legal groupings of + instructions in a bundle. + + We have added a new target independent VLIW packetizer based on the DFA infrastructure to group machine instructions into bundles. + Basic Block Placement + + A probability based block placement and code layout algorithm was added to LLVM's code generator. This layout pass supports probabilities derived from static heuristics as well as source code annotations such as __builtin_expect. + X86-32 and X86-64 Target Improvements + + New features and major changes in the X86 target include: + + Greatly improved support for AVX2. + Lots of bug fixes and improvements for AVX1. + Support for the FMA4 and XOP instruction set extensions. + Call instructions use the new register mask operands for faster compile times and better support for different calling conventions. The old WINCALL instructions are no longer needed. + DW2 Exception Handling is enabled on Cygwin and MinGW. + Support for implicit TLS model used with MSVC runtime. + + ARM Target Improvements + + New features of the ARM target include: + + The constant island pass now supports basic block and constant pool entry alignments greater than 4 bytes. + On Darwin, the ARM target now has a full-featured integrated assembler. + + ARM Integrated Assembler + + The ARM target now includes a full featured macro assembler, including + direct-to-object module support for clang. The assembler is currently + enabled by default for Darwin only pending testing and any additional + necessary platform specific support for Linux. + + Full support is included for Thumb1, Thumb2 and ARM modes, along with + subtarget and CPU specific extensions for VFP2, VFP3 and NEON. + + The assembler is Unified Syntax only (see ARM Architecural Reference Manual for details). While there is some, and growing, support for pre-unfied (divided) syntax, there are still significant gaps in that support. + MIPS Target Improvements + New features and major changes in the MIPS target include: + + MIPS32 little-endian direct object code emission is functional. + MIPS64 little-endian code generation is largely functional for N64 ABI in assembly printing mode with the exception of handling of long double (f128) type. + Support for new instructions has been added, which includes swap-bytes instructions (WSBH and DSBH), floating point multiply-add/subtract and negative multiply-add/subtract instructions, and floating point load/store instructions with reg+reg addressing (LWXC1, etc.) + Various fixes to improve performance have been implemented. + Post-RA scheduling is now enabled at -O3. + Support for soft-float code generation has been added. + clang driver's support for MIPS 64-bits targets. + Support for MIPS floating point ABI option in clang driver. + + PTX Target Improvements + + An outstanding conditional inversion bug was fixed in this release. + + NOTE: LLVM 3.1 marks the last release of the PTX back-end, in its current form. The back-end is currently being replaced by the NVPTX back-end, currently in SVN ToT. + Other Target Specific Improvements + + Support for Qualcomm's Hexagon VLIW processor has been added. + + Major Changes and Removed Features + + If you're already an LLVM user or developer with out-of-tree changes + based on LLVM 3.1, this section lists some "gotchas" that you may run + into upgrading from the previous release. + + LLVM's build system now requires a python 2 interpreter to be present at build time. A perl interpreter is no longer required. + The C backend has been removed. It had numerous problems, to the point of not being able to compile any nontrivial program. + The Alpha, Blackfin and SystemZ targets have been removed due to lack of maintenance. + LLVM 3.1 removes support for reading LLVM 2.9 bitcode files. Going forward, we aim for all future versions of LLVM to read bitcode files and .ll files produced by LLVM 3.0 and later. + The unwind instruction is now gone. With the introduction of the new exception handling system in LLVM 3.0, the unwind instruction became obsolete. + LLVM 3.0 and earlier automatically added the returns_twice fo functions like setjmp based on the name. This functionality was removed in 3.1. This affects Clang users, if -ffreestanding is used. + + Internal API Changes + + In addition, many APIs have changed in this release. Some of the major + LLVM API changes are: + + Target specific options have been moved from global variables to members on the new TargetOptions class, which is local to each TargetMachine. As a consequence, the associated flags will no longer be accepted by clang -mllvm. This includes: + llvm::PrintMachineCode + llvm::NoFramePointerElim + llvm::NoFramePointerElimNonLeaf + llvm::DisableFramePointerElim(const MachineFunction &) + llvm::LessPreciseFPMADOption + llvm::LessPrecideFPMAD() + llvm::NoExcessFPPrecision + llvm::UnsafeFPMath + llvm::NoInfsFPMath + llvm::NoNaNsFPMath + llvm::HonorSignDependentRoundingFPMathOption + llvm::HonorSignDependentRoundingFPMath() + llvm::UseSoftFloat + llvm::FloatABIType + llvm::NoZerosInBSS + llvm::JITExceptionHandling + llvm::JITEmitDebugInfo + llvm::JITEmitDebugInfoToDisk + llvm::GuaranteedTailCallOpt + llvm::StackAlignmentOverride + llvm::RealignStack + llvm::DisableJumpTables + llvm::EnableFastISel + llvm::getTrapFunctionName() + llvm::EnableSegmentedStacks + The MDBuilder class has been added to simplify the creation of metadata. + + Tools Changes + + In addition, some tools have changed in this release. Some of the + changes are: + + llvm-stress is a command line tool for generating random .ll files to fuzz different LLVM components. + The llvm-ld tool has been removed. The clang driver provides a more reliable solution for turning a set of bitcode files into a binary. To merge bitcode files llvm-link can be used instead. + + Python Bindings + + Officially supported Python bindings have been added! Feature support is + far from complete. The current bindings support interfaces to: + + Object File Interface + Disassembler + + Using the Object File Interface, it is possible to inspect binary object + files. Think of it as a Python version of readelf or llvm-objdump. + + Support for additional features is currently being developed by + community contributors. If you are interested in shaping the direction + of the Python bindings, please express your intent on IRC or the + developers list. [1] http://packages.debian.org/source/sid/clang - + [2] http://llvm.org/releases/3.1/docs/ReleaseNotes.html --- Ubuntu Bug Squad volunteer triager http://wiki.ubuntu.com/BugSquad - ProblemType: Bug - DistroRelease: Ubuntu 12.04 + ProblemType: BugDistroRelease: Ubuntu 12.04 Package: clang 3.0-6ubuntu3 ProcVersionSignature: Ubuntu 3.2.0-30.48-generic 3.2.27 Uname: Linux 3.2.0-30-generic x86_64 NonfreeKernelModules: nvidia ApportVersion: 2.0.1-0ubuntu12 Architecture: amd64 Date: Mon Sep 3 01:16:08 2012 InstallationMedia: Ubuntu 12.04 LTS "Precise Pangolin" - Release amd64 (20120425) ProcEnviron: - LANGUAGE=it:it:en - TERM=xterm - PATH=(custom, no user) - LANG=it_IT.UTF-8 - SHELL=/bin/bash - SourcePackage: clang + LANGUAGE=it:it:en + TERM=xterm + PATH=(custom, no user) + LANG=it_IT.UTF-8 + SHELL=/bin/bashSourcePackage: clang UpgradeStatus: No upgrade log present (probably fresh install) -- You received this bug notification because you are a member of Ubuntu Bugs, which is subscribed to Ubuntu. https://bugs.launchpad.net/bugs/1045122 Title: please update clang to 3.1-8 To manage notifications about this bug go to: https://bugs.launchpad.net/ubuntu/+source/clang/+bug/1045122/+subscriptions -- ubuntu-bugs mailing list [email protected] https://lists.ubuntu.com/mailman/listinfo/ubuntu-bugs
