Haswell cpu should support this feature. According to intel software develop manual, processor support for the IA32_TSC_ADJUST MSR is indicated by CPUID.(EAX=07H, ECX=0H):EX.TSC_ADJUST(bit 1). if you run cpuid command on Haswell machine, this bit is 0, so you think haswell cpu can't support this feature. Actually because of the bug in cpuid tool, you get the wrong cpuid value. When cpuid tool execute cpuid instruction, cpuid tool doesn't clear ecx to 0, this is aganist inte spec. After a little modification to CPUID tool, you can get EBX=0x2fbb, not EBX=0.
** Attachment added: "correct cpuid app run on HSW cpu" https://bugs.launchpad.net/ubuntu/+source/xen/+bug/1160378/+attachment/3602711/+files/cpuid -- You received this bug notification because you are a member of Ubuntu Bugs, which is subscribed to Ubuntu. https://bugs.launchpad.net/bugs/1160378 Title: TSC offset support for Xen To manage notifications about this bug go to: https://bugs.launchpad.net/ubuntu/+source/xen/+bug/1160378/+subscriptions -- ubuntu-bugs mailing list ubuntu-bugs@lists.ubuntu.com https://lists.ubuntu.com/mailman/listinfo/ubuntu-bugs
