[10] outlined to use PPC_FEATURE2_SCV but [4] does just that.
In addition [6] added power9 machine settings as only on this ISA it
is available - like:
+ .machine "push"
+ .machine "power9"
scv 0
+ .machine "pop"
Maybe there is some generated "scv 0" left that needs the same [6]
treatment?
OTOH In a normal test program I can run "scv 0" just fine.
But not other scv levels (expected).
# cat test.c
#include <stdio.h>
int main() {
printf("Hello scv 0\n");
__asm__(
"scv 0\n\t"
);
printf("survived\n");
__asm__(
"scv 1\n\t"
);
printf("survived level 1\n");
return 0;
}
# gcc -Wall -o test test.c
./test
Hello scv 0
survived
Illegal instruction (core dumped)
IIRC .machine is only a psedo-op for the assembler.
So it is correct that I can't see it in the live disassembly of gdb.
The failing "svc 0" from glibcs __GI___ioctl is
0x00007ffff66c49a0 <+320>: 01 00 00 44 scv 0
And in my test program it is
0x0000000100000848 <+44>: 01 00 00 44 scv 0
Hmm, this is the same opcode but fails in just one of the cases.
This might need someone being more an ppc64/glibc expert than me :-/
@Frank - could you modify this bug to become mirrored to IBM for their
arch-expertise please?
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https://bugs.launchpad.net/bugs/1920784
Title:
qemu-system-ppc64le fails with kvm acceleration
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