Valentin's patch 
target/riscv: Fix endianness swap on compressed instructions
https://lore.kernel.org/qemu-devel/[email protected]/
has been accepted by the upstream maintainer and included in a pull request.

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https://bugs.launchpad.net/bugs/2123828

Title:
  RISC-V: incorrect emulation of load and store on big-endian systems

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