Public bug reported:
clang-22 (all point releases through 22.1.8) fatally aborts on any HIP or LLVM IR translation unit that contains an `amdgpu_kernel` whose CFG includes a block ending in `llvm.trap()` with no successors, when targeting **gfx1100, gfx1101, or gfx1102** (RDNA3 desktop: RX 7900, RX 7800, RX 7700, RX 7600): ``` fatal error: error in backend: Unsupported instruction : <MCInst 4399 <MCOperand Reg:7675> <MCOperand Reg:7679> <MCOperand Reg:7675>> clang++: error: clang frontend command failed with exit code 70 ``` The trigger is common enough to make real projects FTBFS. In particular, PyTorch 2.12's `aten/src/ATen/native/hip/Loss.hip` (NLL loss backward) hits this on every ROCm 7.2 build for gfx110x; PyTorch's Debian/Ubuntu ROCm packaging currently ships a workaround that filters gfx110x out of `PYTORCH_ROCM_ARCH`, so those RDNA3 desktop cards get no accelerated PyTorch until this is fixed. ## Root cause `SIInstrInfo::insertSimulatedTrap` returns `HaltLoopBB` when the trap sits in a block with no successors and is the last instruction. Since `HaltLoopBB` is appended to the end of the function, `FinalizeISel` jumps there and skips any intermediate blocks, **leaving their pseudos unexpanded**. Those unexpanded pseudos reach the MC layer, which has no encoding for pseudo opcodes — hence "Unsupported instruction : <MCInst NNNN ...>". Full details, minimal 21-line LLVM IR reproducer, and arch matrix in the upstream issue: https://github.com/llvm/llvm-project/issues/208912 ## Fix Upstream commit `9429a1e809fdf05e1eef1350f27569ae53ccd721` (https://github.com/llvm/llvm-project/pull/174774) — "[AMDGPU] Fix insertSimulatedTrap to return correct continuation block". Merged to `main` on 2026-01-21. `release/22.x` was cut from `main` at merge-base `e9f758a59b2f` (2026-01-13), **eight days before this fix landed**, and no subsequent 22.x point release has picked it up. The fix will land in LLVM 23. The patch is small (10 lines in `llvm/lib/Target/AMDGPU/SIInstrInfo.cpp`; upstream also adds a 56-line MIR test) and self-contained — no dependent commits, no API changes. ## Reproducer ```llvm target triple = "amdgcn-amd-amdhsa" declare void @llvm.trap() #0 define amdgpu_kernel void @kern(i64 %0, i1 %1, ptr %2) { br i1 %1, label %5, label %4 4: call void @llvm.trap() unreachable 5: %6 = getelementptr double, ptr %2, i64 %0 store double 0.000000e+00, ptr %6, align 8 ret void } attributes #0 = { cold noreturn nounwind memory(inaccessiblemem: write) } ``` Save as `reduced.ll`, then: ``` llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1102 -O3 -filetype=obj reduced.ll -o /tmp/out.o ``` - Without the fix (current 22.1.8): fatal error, exit 134. - With the fix (clang-23 nightly from apt.llvm.org, or 22.1.8 with the cherry-pick): exits 0, produces a valid `.o`. Same arch matrix: only gfx1100, gfx1101, gfx1102 fail. All other AMDGPU targets (gfx803, gfx900, gfx906, gfx908, gfx90a, gfx942, gfx1010, gfx1030, gfx1151, gfx1200, gfx1201) build cleanly on both. ## Regression risk Very low. - Fix is a 10-line diff in a single AMDGPU-specific file (`SIInstrInfo.cpp`). - It only changes what `insertSimulatedTrap` returns; the returned block was previously an incorrect "signal to skip intermediate expansion" that produced the malformed MI stream we're trying to encode. - Every AMDGPU target uses the same code; the visible failure was gfx110x-specific because the MCInst table happens to slot a pseudo opcode there in a way that the MC layer catches. Other targets were saved by ordering luck; either way, the corrected return value strictly improves behavior. - Upstream ships an accompanying MIR test (`llvm/test/CodeGen/AMDGPU/simulated-trap-pseudo-expand.ll`) to lock in the fix. ** Affects: llvm-toolchain-22 (Ubuntu) Importance: Undecided Assignee: Talha Can Havadar (tchavadar) Status: New ** Summary changed: - llvm-toolchain-22: AMDGPU codegen crash on gfx1100/gfx1101/gfx1102 (RDNA3): "Unsupported instruction : <MCInst NNNN ...>" + AMDGPU codegen crash on gfx1100/gfx1101/gfx1102 (RDNA3): "Unsupported instruction : <MCInst NNNN ...>" ** Changed in: llvm-toolchain-22 (Ubuntu) Assignee: (unassigned) => Talha Can Havadar (tchavadar) -- You received this bug notification because you are a member of Ubuntu Bugs, which is subscribed to Ubuntu. https://bugs.launchpad.net/bugs/2160428 Title: AMDGPU codegen crash on gfx1100/gfx1101/gfx1102 (RDNA3): "Unsupported instruction : <MCInst NNNN ...>" To manage notifications about this bug go to: https://bugs.launchpad.net/ubuntu/+source/llvm-toolchain-22/+bug/2160428/+subscriptions -- ubuntu-bugs mailing list [email protected] https://lists.ubuntu.com/mailman/listinfo/ubuntu-bugs
