I have a MCF5282 design which utilizes two 128mbit (1meg x 32 x 4) DDR SDRAM
devices from Micron (MT48LC4M32B2TG). I've got an 80MHz clock and I'm pretty
sure I've got the SDRAM controller in the 5282 configured correctly:
DCR = 0x013f
DACR0 = 0x20001300
DMR0 = 0x0fc00001
[pause]
DACR0 = 0x20001308
read 0x20000000
DACR0 = 0x20009300
[pause]
DACR0 = 0x20009340
[pause]
read 0x20080400
(SDRAM #1 is identical, but 0x21000000)
I haven't booted anything on this board yet; so far everything here has been
done through either GDB or P&E's ICD.
It seems to be right, as I can read and write to the SDRAM and data seems to
be retained. However, writes seem to be duplicated every 4 bytes. e.g. a
write to 0x20000000 writes the same value to 0x20000004, a write to
0x20001234 also writes to 0x20001238.
I spent a good chunk of the day today scoping out A2 as I figured that's what
was causing this (maybe a cracked ball or shorted trace or something) but
then it dawned on me that this isn't how SDRAM works at all.
I have wired up the memory according to the MCF5282's SDRAM controller
documentation:
SDRAM MCF5282
A0 A15
A1 A14
A2 A13
A3 A12
A4 A11
A5 A10
A6 A9
A7 A17
A8 A18
A9 A19
A10 A20
A11 A21
(A22 goes to bank select 0, and A23 to bank select 1)
My problem is that I have absolutely no idea how to debug this! There are
4096 rows with 256 columns in each row, but I'm not sure how the 5282 maps
logical addresses to rows and columns. I briefly tried scoping out the
higher-order address lines ("logically" starting at A13) and triggering on
#SDWE, but nothing obvious came up from that.
I was originally triggering on #OE (not the SDRAM OE# signals, but the 5282
bus signal) and what was baffling was that that was triggering for my SDRAM
accesses. The only thing I can think of that could be causing that would be
#CS0 since by default that decodes every external address, but I don't think
that'd be causing my odd repeated write issue.
Is there any documentation or can anyone give me any tips on how to start
diagnosing this problem? It doesn't matter if I write aligned bytes, words
or dwords; the same data appears 4 bytes later.
-A.
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