<SNIP>
and if i use flash SST - SST39VF3201(4MB), I was getting message like this
Internal flash device timeout occurred or write operation was performed
while flash was programming.
 
i think i was getting these warnings as SST flash is little faster than
Spansion. When i was using CFI probe, the chip was not getting detected. So
i used JEDEC Probe.
 
and I added busy checking using DQ7 also with DQ6 and DQ5, instead of only
DQ6(Toggling) and DQ5 , in the cfi_cmdset_0002.c, for avoiding these
warnings
 
Now both SST and Spansion chips are working fine.
 
I don't know whether what i did is 100% correct, but it is correct according
to datasheets of these IC's. Now i am not facing any issues in flash(With
JEDEC probe)
 
And SST flash which i used is having very good flash erase timings compared
to others which i used
 
Regards
Steven

<SNIP>

 

Hello Steven,

 

This is regarding the modification of "cfi_cmdset_0002.c" file for DQ5 / DQ7
bit check issues during write and erase to make proper use of SST39VF3201
flash chips. (refer to mail list info above.)
 
I also found a post from you on
"http://osdir.com/ml/uclinux.devel/2005-12/msg00246.html"; in which you have
mentioned the modifications to be tried out for DQ7 check.
<SNIP>
I added DQ7 checking also
in the program/erase busy check sequence in erase in cfi_cmdset_0002.c
 
        dq7 = CMD(1<<7);//Steven Added
        dq6 = CMD(1<<6);
        dq5 = CMD(1<<5);
 
        oldstatus = cfi_read(map, adr);
        status = cfi_read(map, adr);
#if 0
        while( ((status & dq6) != (oldstatus & dq6)) &&
                ((status & dq5) != dq5) &&
                !time_after(jiffies, timeo)) {
#endif
        while( ((status & dq7) == 0) && !time_after(jiffies, timeo)){
 
try this once
 
regards
Steven
<SNIP>
 
I tried the above suggestion but didn't work quite well. it still kept
throwing out DQ5 raised warning. Will be trying it out additional changes
shortly.
 
Has anyone implemented any further patch or code since then for supporting
this SST flash.
Would it be possible for someone to give the patch for it or at least put up
part of the modified code online.
 
Further with reference to DQ7 checking. I wonder what happens when the chip
is in erase or write cycle for too long. unlike DQ5 for AMD chips there is
nothing mentioned in datasheet which indicates this situation.
 
 
Inputs from you will be greatly appreciated.

 

 

 

  

 

Regards,

Bruno P. Lasrado

================================================================

 

 

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