(We are using all the devices with a bit-banging driver
on a different controller, so I know quite exactly what the slaves are
doing.)
This is true if you design the hardware and the driver you are right,
but a standard driver should be configurable for any external chip.
There currently are two different problems:
- the driver in its current state (without my modification) does not
return an error if there is no acknowledge at all. In this case there
is no timeout needed because there is no client that could do clock
stretching. IMHO, this is a straight bug and should be fixed if
the hardware in all supported processors supports this. I was hoping
that maybe somebody here has an overview about the I2C controller
evolution in the coldfire family.
I seem to remember that (some years ago) I read a documentation of an
I²C driven chip that issued the ACK not before some internal state was
reached and thus there could be a sequence of dummy clock cycles before
the ACK. But maybe this is off-standard.
-Michael
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