Michael Schnell wrote:
Same will have two SPI Flash chips. One for "Program" (e.g. FPGA
configuration, Bootloader, Kernel, image of the root FS, user Software
etc) and another chip (featuring smaller blocks and more erase cycles)
for "Data", that can be written automatically.
You can consider some SPI flash chips from MXIC, eg MX25L1605, which
feature additional 4kbits eerom on the same chip.
I suppose there is an MTD (or similar) driver that converts the SPI
flash chips to be block devices and that I can mount (e.g.) CRAMFS for
the stuff to be copied into RAM and (e.g.) JFFS2 for dynamically used
data.
You can use EPCS MTD chip driver, which accesses SPI flash through FPGA
configuration port.
We prefer initramfs instead of cramfs or romfs, as it is easier and used
widely on latest Linux desktop. It is used by default in uClinux-dist
nios2 arch.
You can use JFFS2 for user data, but it requires more space than 4kbits.
For simple user data, you can access directly over MTD device.
You may find more related on Nios Wiki. I do recommend uClinux-dist over
Microtronix's.
BTW, I have work out the way to debug apps on uClinux. Eclipse CDT
should not be far.
Cheer,
Thomas Chou
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