Jamie Lokier wrote:
> It's also possibly to do atomic memory operations the way older
> versions of ARM do cmpxchg (they don't have an instruction for it).
> 
> They call a routine in the kernel address space (but not a syscall).
> Kernel task switching checks if the intruction pointer is inside that
> code sequence, and restarts the cmpxchg sequence if it is.  That makes
> it effectively atomic without disabling interrupts, and works with
> normal userspace protections.  It doesn't work on SMP, but we assume
> SMP ARMs will be a newer version which has atomic instructions.

We do exactly the same thing on the Blackfin.  I thought I'd invented
the technique - apparently not.


Bernd
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