Hi Greg,
Since the same I2C controller is used on all the Coldfires that have hardware
I2C, add support for I2C to each of the platforms and remove superfluous
and redundant definitions.
Signed-off-by: Steven King <sfk...@fdwdc.com>
arch/m68k/include/asm/m5206sim.h | 2 +
arch/m68k/include/asm/m520xsim.h | 1 +
arch/m68k/include/asm/m523xsim.h | 5 ++
arch/m68k/include/asm/m5249sim.h | 5 ++
arch/m68k/include/asm/m527xsim.h | 7 +++
arch/m68k/include/asm/m528xsim.h | 38 +--------------
arch/m68k/include/asm/m5307sim.h | 3 +-
arch/m68k/include/asm/m532xsim.h | 37 +---------------
arch/m68k/include/asm/m5407sim.h | 2 +
arch/m68k/include/asm/mcfi2c.h | 29 ++++++++++++
arch/m68k/include/asm/mcfmbus.h | 77 --------------------------------
arch/m68knommu/platform/5206/config.c | 41 +++++++++++++++++
arch/m68knommu/platform/5206e/config.c | 41 +++++++++++++++++
arch/m68knommu/platform/520x/config.c | 45 ++++++++++++++++++
arch/m68knommu/platform/523x/config.c | 46 +++++++++++++++++++
arch/m68knommu/platform/5249/config.c | 77 ++++++++++++++++++++++++++++++++
arch/m68knommu/platform/527x/config.c | 60 +++++++++++++++++++++++++
arch/m68knommu/platform/528x/config.c | 51 +++++++++++++++++++++
arch/m68knommu/platform/5307/config.c | 42 +++++++++++++++++-
arch/m68knommu/platform/532x/config.c | 45 ++++++++++++++++++
arch/m68knommu/platform/5407/config.c | 41 +++++++++++++++++
21 files changed, 545 insertions(+), 150 deletions(-)
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index 9c384e2..97809c6 100644
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -91,6 +91,7 @@
/*
* Define system peripheral IRQ usage.
*/
+#define MCF_IRQ_I2C 29 /* I2C, Level 5 */
#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
@@ -117,6 +118,7 @@
#define MCFSIM_SWDICR MCFSIM_ICR8 /* Watchdog timer ICR */
#define MCFSIM_TIMER1ICR MCFSIM_ICR9 /* Timer 1 ICR */
#define MCFSIM_TIMER2ICR MCFSIM_ICR10 /* Timer 2 ICR */
+#define MCFSIM_I2CICR MCFSIM_ICR11 /* I2C ICR */
#define MCFSIM_UART1ICR MCFSIM_ICR12 /* UART 1 ICR */
#define MCFSIM_UART2ICR MCFSIM_ICR13 /* UART 2 ICR */
#ifdef CONFIG_M5206e
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index 1b6fb8c..132e49d 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -41,6 +41,7 @@
#define MCFINT_UART0 26 /* Interrupt number for UART0 */
#define MCFINT_UART1 27 /* Interrupt number for UART1 */
#define MCFINT_UART2 28 /* Interrupt number for UART2 */
+#define MCFINT_I2C 30 /* Interrupt number for I2C */
#define MCFINT_QSPI 31 /* Interrupt number for QSPI */
#define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in
processor) */
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index 7660277..cb0d598 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -30,6 +30,7 @@
#define MCFINT_VECBASE 64 /* Vector base number */
#define MCFINT_UART0 13 /* Interrupt number for
UART0 */
#define MCFINT_PIT1 36 /* Interrupt number for
PIT1 */
+#define MCFINT_I2C 17 /* Interrupt number for
I2C */
#define MCFINT_QSPI 18 /* Interrupt number for QSPI */
/*
@@ -130,5 +131,9 @@
#define MCFGPIO_IRQ_MAX 8
#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
+/*
+ * Pinmux
+ */
+#define MCFGPIO_PAR_FECI2C 0x100047
/****************************************************************************/
#endif /* m523xsim_h */
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index 840fb4a..d9d3308 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -63,6 +63,7 @@
#define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */
#define MCFSIM_TIMER1ICR MCFSIM_ICR1 /* Timer 1 ICR */
#define MCFSIM_TIMER2ICR MCFSIM_ICR2 /* Timer 2 ICR */
+#define MCFSIM_I2CICR MCFSIM_ICR3 /* I2C ICR */
#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */
#define MCFSIM_UART2ICR MCFSIM_ICR5 /* UART 2 ICR */
#define MCFSIM_DMA0ICR MCFSIM_ICR6 /* DMA 0 ICR */
@@ -73,6 +74,7 @@
/*
* Define system peripheral IRQ usage.
*/
+#define MCF_IRQ_I2C 29 /* I2C, Level 5 */
#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
@@ -106,6 +108,8 @@
#define MCFSIM2_IDECONFIG1 0x18c /* IDEconfig1 */
#define MCFSIM2_IDECONFIG2 0x190 /* IDEconfig2 */
+#define MCFSIM2_INTPRI_62 0x0f000000 /* INT62 in
MCFSIM2_LEVEL8 */
+#define MCFSIM2_INTPRI_I2C 0x05000000 /* INT62 (I2C) priority
5 */
/*
* Define the base interrupt for the second interrupt controller.
* We set it to 128, out of the way of the base interrupts, and plenty
@@ -122,6 +126,7 @@
#define MCFINTC2_GPIOIRQ6 (MCFINTC2_VECBASE + 38)
#define MCFINTC2_GPIOIRQ7 (MCFINTC2_VECBASE + 39)
+#define MCFINTC2_I2C (MCFINTC2_VECBASE + 62)
/*
* Generic GPIO support
*/
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 81d69a8..8e58fa7 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -31,6 +31,7 @@
#define MCFINT_UART0 13 /* Interrupt number for
UART0 */
#define MCFINT_UART1 14 /* Interrupt number for
UART1 */
#define MCFINT_UART2 15 /* Interrupt number for
UART2 */
+#define MCFINT_I2C 17 /* Interrupt number for
I2C */
#define MCFINT_PIT1 36 /* Interrupt number for
PIT1 */
/*
@@ -242,6 +243,12 @@
#define UART2_ENABLE_MASK 0x3f00
#endif
+#ifdef CONFIG_M5271
+#define MCF_GPIO_PAR_FECI2C 0x100047
+#endif
+#ifdef CONFIG_M5275
+#define MCF_GPIO_PAR_FECI2C 0x100082
+#endif
/*
* Reset Controll Unit (relative to IPSBAR).
*/
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index e2ad1f4..8455c85 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -29,6 +29,7 @@
#define MCFINT_VECBASE 64 /* Vector base number */
#define MCFINT_UART0 13 /* Interrupt number for
UART0 */
+#define MCFINT_I2C 17 /* Interrupt number for
I2C */
#define MCFINT_PIT1 55 /* Interrupt number for
PIT1 */
/*
@@ -195,8 +196,8 @@
* Derek Cheung - 6 Feb 2005
* add I2C and QSPI register definition using Freescale's MCF5282
*/
-/* set Port AS pin for I2C or UART */
-#define MCF5282_GPIO_PASPAR (volatile u16 *) (MCF_IPSBAR + 0x00100056)
+/* Port AS Pin Assignment Register (16 Bit) */
+#define MCF5282_GPIO_PASPAR 0x100056
/* Port UA Pin Assignment Register (8 Bit) */
#define MCF5282_GPIO_PUAPAR 0x10005C
@@ -216,39 +217,6 @@
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset
*/
-/*********************************************************************
-*
-* Inter-IC (I2C) Module
-*
-*********************************************************************/
-/* Read/Write access macros for general use */
-#define MCF5282_I2C_I2ADR (volatile u8 *) (MCF_IPSBAR + 0x0300) //
Address
-#define MCF5282_I2C_I2FDR (volatile u8 *) (MCF_IPSBAR + 0x0304) // Freq
Divider
-#define MCF5282_I2C_I2CR (volatile u8 *) (MCF_IPSBAR + 0x0308) //
Control
-#define MCF5282_I2C_I2SR (volatile u8 *) (MCF_IPSBAR + 0x030C) // Status
-#define MCF5282_I2C_I2DR (volatile u8 *) (MCF_IPSBAR + 0x0310) // Data
I/O
-
-/* Bit level definitions and macros */
-#define MCF5282_I2C_I2ADR_ADDR(x) (((x)&0x7F)<<0x01)
-
-#define MCF5282_I2C_I2FDR_IC(x) (((x)&0x3F))
-
-#define MCF5282_I2C_I2CR_IEN (0x80) // I2C enable
-#define MCF5282_I2C_I2CR_IIEN (0x40) // interrupt enable
-#define MCF5282_I2C_I2CR_MSTA (0x20) // master/slave mode
-#define MCF5282_I2C_I2CR_MTX (0x10) // transmit/receive mode
-#define MCF5282_I2C_I2CR_TXAK (0x08) // transmit acknowledge enable
-#define MCF5282_I2C_I2CR_RSTA (0x04) // repeat start
-
-#define MCF5282_I2C_I2SR_ICF (0x80) // data transfer bit
-#define MCF5282_I2C_I2SR_IAAS (0x40) // I2C addressed as a slave
-#define MCF5282_I2C_I2SR_IBB (0x20) // I2C bus busy
-#define MCF5282_I2C_I2SR_IAL (0x10) // aribitration lost
-#define MCF5282_I2C_I2SR_SRW (0x04) // slave read/write
-#define MCF5282_I2C_I2SR_IIF (0x02) // I2C interrupt
-#define MCF5282_I2C_I2SR_RXAK (0x01) // received acknowledge
-
-
/*********************************************************************
*
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index c6830e5..5c8cf96 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -117,6 +117,7 @@
#define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */
#define MCFSIM_TIMER1ICR MCFSIM_ICR1 /* Timer 1 ICR */
#define MCFSIM_TIMER2ICR MCFSIM_ICR2 /* Timer 2 ICR */
+#define MCFSIM_I2CICR MCFSIM_ICR3 /* I2C ICR */
#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */
#define MCFSIM_UART2ICR MCFSIM_ICR5 /* UART 2 ICR */
#define MCFSIM_DMA0ICR MCFSIM_ICR6 /* DMA 0 ICR */
@@ -124,7 +125,6 @@
#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */
-
/*
* Some symbol defines for the Parallel Port Pin Assignment Register
*/
@@ -143,6 +143,7 @@
/*
* Define system peripheral IRQ usage.
*/
+#define MCF_IRQ_I2C 29 /* I2C, Level 5 */
#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index 36bf15a..402a4e0 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -17,6 +17,7 @@
#define MCFINT_UART0 26 /* Interrupt number for UART0 */
#define MCFINT_UART1 27 /* Interrupt number for UART1 */
#define MCFINT_UART2 28 /* Interrupt number for UART2 */
+#define MCFINT_I2C 30 /* Interrupt number for I2C */
#define MCF_WTM_WCR MCF_REG16(0xFC098000)
@@ -111,42 +112,6 @@
#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset
*/
-/*********************************************************************
- *
- * Inter-IC (I2C) Module
- *
- *********************************************************************/
-
-/* Read/Write access macros for general use */
-#define MCF532x_I2C_I2ADR (volatile u8 *) (0xFC058000) // Address
-#define MCF532x_I2C_I2FDR (volatile u8 *) (0xFC058004) // Freq Divider
-#define MCF532x_I2C_I2CR (volatile u8 *) (0xFC058008) // Control
-#define MCF532x_I2C_I2SR (volatile u8 *) (0xFC05800C) // Status
-#define MCF532x_I2C_I2DR (volatile u8 *) (0xFC058010) // Data I/O
-
-/* Bit level definitions and macros */
-#define MCF532x_I2C_I2ADR_ADDR(x) (((x)&0x7F)<<0x01)
-
-#define MCF532x_I2C_I2FDR_IC(x) (((x)&0x3F))
-
-#define MCF532x_I2C_I2CR_IEN (0x80) // I2C enable
-#define MCF532x_I2C_I2CR_IIEN (0x40) // interrupt enable
-#define MCF532x_I2C_I2CR_MSTA (0x20) // master/slave mode
-#define MCF532x_I2C_I2CR_MTX (0x10) // transmit/receive mode
-#define MCF532x_I2C_I2CR_TXAK (0x08) // transmit acknowledge enable
-#define MCF532x_I2C_I2CR_RSTA (0x04) // repeat start
-
-#define MCF532x_I2C_I2SR_ICF (0x80) // data transfer bit
-#define MCF532x_I2C_I2SR_IAAS (0x40) // I2C addressed as a slave
-#define MCF532x_I2C_I2SR_IBB (0x20) // I2C bus busy
-#define MCF532x_I2C_I2SR_IAL (0x10) // aribitration lost
-#define MCF532x_I2C_I2SR_SRW (0x04) // slave read/write
-#define MCF532x_I2C_I2SR_IIF (0x02) // I2C interrupt
-#define MCF532x_I2C_I2SR_RXAK (0x01) // received acknowledge
-
-#define MCF532x_PAR_FECI2C (volatile u8 *) (0xFC0A4053)
-
-
/*
* The M5329EVB board needs a help getting its devices initialized
* at kernel start time if dBUG doesn't set it up (for example
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index c399abb..5aa8618 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -89,6 +89,7 @@
#define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */
#define MCFSIM_TIMER1ICR MCFSIM_ICR1 /* Timer 1 ICR */
#define MCFSIM_TIMER2ICR MCFSIM_ICR2 /* Timer 2 ICR */
+#define MCFSIM_I2CICR MCFSIM_ICR3 /* I2C ICR */
#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */
#define MCFSIM_UART2ICR MCFSIM_ICR5 /* UART 2 ICR */
#define MCFSIM_DMA0ICR MCFSIM_ICR6 /* DMA 0 ICR */
@@ -114,6 +115,7 @@
/*
* Define system peripheral IRQ usage.
*/
+#define MCF_IRQ_I2C 29 /* I2C, Level 5 */
#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
diff --git a/arch/m68k/include/asm/mcfi2c.h b/arch/m68k/include/asm/mcfi2c.h
new file mode 100644
index 0000000..5713981
--- /dev/null
+++ b/arch/m68k/include/asm/mcfi2c.h
@@ -0,0 +1,29 @@
+/*
+ * Definitions for Coldfire I2C interface
+*/
+#ifndef mcfi2c_h
+#define mcfi2c_h
+
+#if defined(CONFIG_M5206) || defined(CONFIG_M5206e)
+#define MCFI2C_IOBASE (MCF_MBAR + 0x1e0)
+#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
+#define MCFI2C_IOBASE (MCF_IPSBAR + 0x300)
+#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
+#define MCFI2C_IOBASE (MCF_MBAR + 0x280)
+#ifdef CONFIG_M5249
+#define MCFI2C_IOBASE2 (MCF_MBAR2 + 0x440)
+#endif
+#elif defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_M5445x)
+#define MCFI2C_IOBASE 0xFC058000
+#endif
+#define MCFI2C_IOSIZE 0x40
+
+/**
+ * struct mcfi2c_platform_data - platform data for the coldfire i2c driver
+ * @bitrate: bitrate to use for this i2c controller.
+*/
+struct mcfi2c_platform_data {
+ u32 bitrate;
+};
+
+#endif /* mcfi2c_h */
diff --git a/arch/m68k/include/asm/mcfmbus.h b/arch/m68k/include/asm/mcfmbus.h
deleted file mode 100644
index 319899c..0000000
--- a/arch/m68k/include/asm/mcfmbus.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/****************************************************************************/
-
-/*
- * mcfmbus.h -- Coldfire MBUS support defines.
- *
- * (C) Copyright 1999, Martin Floeer (mflo...@axcent.de)
- */
-
-/****************************************************************************/
-
-
-#ifndef mcfmbus_h
-#define mcfmbus_h
-
-
-#define MCFMBUS_BASE 0x280
-#define MCFMBUS_IRQ_VECTOR 0x19
-#define MCFMBUS_IRQ 0x1
-#define MCFMBUS_CLK 0x3f
-#define MCFMBUS_IRQ_LEVEL 0x07 /*IRQ Level 1*/
-#define MCFMBUS_ADDRESS 0x01
-
-
-/*
-* Define the 5307 MBUS register set addresses
-*/
-
-#define MCFMBUS_MADR 0x00
-#define MCFMBUS_MFDR 0x04
-#define MCFMBUS_MBCR 0x08
-#define MCFMBUS_MBSR 0x0C
-#define MCFMBUS_MBDR 0x10
-
-
-#define MCFMBUS_MADR_ADDR(a) (((a)&0x7F)<<0x01) /*Slave Address*/
-
-#define MCFMBUS_MFDR_MBC(a) ((a)&0x3F) /*M-Bus Clock*/
-
-/*
-* Define bit flags in Control Register
-*/
-
-#define MCFMBUS_MBCR_MEN (0x80) /* M-Bus Enable */
-#define MCFMBUS_MBCR_MIEN (0x40) /* M-Bus Interrupt Enable */
-#define MCFMBUS_MBCR_MSTA (0x20) /* Master/Slave Mode Select Bit */
-#define MCFMBUS_MBCR_MTX (0x10) /* Transmit/Rcv Mode Select Bit */
-#define MCFMBUS_MBCR_TXAK (0x08) /* Transmit Acknowledge Enable */
-#define MCFMBUS_MBCR_RSTA (0x04) /* Repeat Start */
-
-/*
-* Define bit flags in Status Register
-*/
-
-#define MCFMBUS_MBSR_MCF (0x80) /* Data Transfer Complete */
-#define MCFMBUS_MBSR_MAAS (0x40) /* Addressed as a Slave */
-#define MCFMBUS_MBSR_MBB (0x20) /* Bus Busy */
-#define MCFMBUS_MBSR_MAL (0x10) /* Arbitration Lost */
-#define MCFMBUS_MBSR_SRW (0x04) /* Slave Transmit */
-#define MCFMBUS_MBSR_MIF (0x02) /* M-Bus Interrupt */
-#define MCFMBUS_MBSR_RXAK (0x01) /* No Acknowledge Received */
-
-/*
-* Define bit flags in DATA I/O Register
-*/
-
-#define MCFMBUS_MBDR_READ (0x01) /* 1=read 0=write MBUS */
-
-#define MBUSIOCSCLOCK 1
-#define MBUSIOCGCLOCK 2
-#define MBUSIOCSADDR 3
-#define MBUSIOCGADDR 4
-#define MBUSIOCSSLADDR 5
-#define MBUSIOCGSLADDR 6
-#define MBUSIOCSSUBADDR 7
-#define MBUSIOCGSUBADDR 8
-
-#endif
diff --git a/arch/m68knommu/platform/5206/config.c
b/arch/m68knommu/platform/5206/config.c
index 9c33546..bb31b34 100644
--- a/arch/m68knommu/platform/5206/config.c
+++ b/arch/m68knommu/platform/5206/config.c
@@ -17,6 +17,7 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfi2c.h>
/***************************************************************************/
@@ -38,8 +39,45 @@ static struct platform_device m5206_uart = {
.dev.platform_data = m5206_uart_platform,
};
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+static struct resource m5206_i2c_resources[] = {
+ {
+ .start = MCFI2C_IOBASE,
+ .end = MCFI2C_IOBASE + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCF_IRQ_I2C,
+ .end = MCF_IRQ_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mcfi2c_platform_data m5206_i2c_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct platform_device m5206_i2c = {
+ .name = "i2c-mcf",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(m5206_i2c_resources),
+ .resource = m5206_i2c_resources,
+ .dev.platform_data = &m5206_i2c_platform_data,
+};
+
+static void __init m5206_i2c_init(void)
+{
+ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
+ MCF_MBAR + MCFSIM_I2CICR);
+ mcf_mapirq2imr(MCF_IRQ_I2C, MCFINTC_I2C);
+}
+#endif
+
static struct platform_device *m5206_devices[] __initdata = {
&m5206_uart,
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ &m5206_i2c,
+#endif
};
/***************************************************************************/
@@ -101,6 +139,9 @@ void __init config_BSP(char *commandp, int size)
mach_reset = m5206_cpu_reset;
m5206_timers_init();
m5206_uarts_init();
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ m5206_i2c_init();
+#endif
/* Only support the external interrupts on their primary level */
mcf_mapirq2imr(25, MCFINTC_EINT1);
diff --git a/arch/m68knommu/platform/5206e/config.c
b/arch/m68knommu/platform/5206e/config.c
index 9423979..a10d9d1 100644
--- a/arch/m68knommu/platform/5206e/config.c
+++ b/arch/m68knommu/platform/5206e/config.c
@@ -17,6 +17,7 @@
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
#include <asm/mcfdma.h>
+#include <asm/mcfi2c.h>
/***************************************************************************/
@@ -38,8 +39,45 @@ static struct platform_device m5206e_uart = {
.dev.platform_data = m5206e_uart_platform,
};
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+static struct resource m5206e_i2c_resources[] = {
+ {
+ .start = MCFI2C_IOBASE,
+ .end = MCFI2C_IOBASE + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCF_IRQ_I2C,
+ .end = MCF_IRQ_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mcfi2c_platform_data m5206e_i2c_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct platform_device m5206e_i2c = {
+ .name = "i2c-mcf",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(m5206e_i2c_resources),
+ .resource = m5206e_i2c_resources,
+ .dev.platform_data = &m5206e_i2c_platform_data,
+};
+
+static void __init m5206e_i2c_init(void)
+{
+ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
+ MCF_MBAR + MCFSIM_I2CICR);
+ mcf_mapirq2imr(MCF_IRQ_I2C, MCFINTC_I2C);
+}
+#endif
+
static struct platform_device *m5206e_devices[] __initdata = {
&m5206e_uart,
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ &m5206e_i2c,
+#endif
};
/***************************************************************************/
@@ -107,6 +145,9 @@ void __init config_BSP(char *commandp, int size)
mach_reset = m5206e_cpu_reset;
m5206e_timers_init();
m5206e_uarts_init();
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ m5206e_i2c_init();
+#endif
/* Only support the external interrupts on their primary level */
mcf_mapirq2imr(25, MCFINTC_EINT1);
diff --git a/arch/m68knommu/platform/520x/config.c
b/arch/m68knommu/platform/520x/config.c
index 92614de..3206f7e 100644
--- a/arch/m68knommu/platform/520x/config.c
+++ b/arch/m68knommu/platform/520x/config.c
@@ -19,6 +19,7 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfi2c.h>
/***************************************************************************/
@@ -74,9 +75,50 @@ static struct platform_device m520x_fec = {
.resource = m520x_fec_resources,
};
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+static struct resource m520x_i2c_resources[] = {
+ {
+ .start = MCFI2C_IOBASE,
+ .end = MCFI2C_IOBASE + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCFINT_VECBASE + MCFINT_I2C,
+ .end = MCFINT_VECBASE + MCFINT_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mcfi2c_platform_data m520x_i2c_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct platform_device m520x_i2c = {
+ .name = "i2c-mcf",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(m520x_i2c_resources),
+ .resource = m520x_i2c_resources,
+ .dev.platform_data = &m520x_i2c_platform_data,
+};
+
+static void __init m520x_i2c_init(void)
+{
+ u8 par;
+
+ /* setup Port FECI2C Pin Assignment Register for I2C */
+ /* set PAR_SCL to SCL and PAR_SDA to SDA */
+ par = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
+ par |= 0x0f;
+ writeb(par, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
+}
+#endif
+
static struct platform_device *m520x_devices[] __initdata = {
&m520x_uart,
&m520x_fec,
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ &m520x_i2c,
+#endif
};
/***************************************************************************/
@@ -147,6 +189,9 @@ void __init config_BSP(char *commandp, int size)
mach_reset = m520x_cpu_reset;
m520x_uarts_init();
m520x_fec_init();
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ m520x_i2c_init();
+#endif
}
/***************************************************************************/
diff --git a/arch/m68knommu/platform/523x/config.c
b/arch/m68knommu/platform/523x/config.c
index 6ba84f2..05b4ab9 100644
--- a/arch/m68knommu/platform/523x/config.c
+++ b/arch/m68knommu/platform/523x/config.c
@@ -20,6 +20,7 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfi2c.h>
/***************************************************************************/
@@ -75,9 +76,51 @@ static struct platform_device m523x_fec = {
.resource = m523x_fec_resources,
};
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+static struct resource m523x_i2c_resources[] = {
+ {
+ .start = MCFI2C_IOBASE,
+ .end = MCFI2C_IOBASE + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCFINT_VECBASE + MCFINT_I2C,
+ .end = MCFINT_VECBASE + MCFINT_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mcfi2c_platform_data m523x_i2c_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct platform_device m523x_i2c = {
+ .name = "i2c-mcf",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(m523x_i2c_resources),
+ .resource = m523x_i2c_resources,
+ .dev.platform_data = &m523x_i2c_platform_data,
+};
+
+static void __init m523x_i2c_init(void)
+{
+ u8 par;
+
+ /* setup Port AS Pin Assignment Register for I2C */
+ /* set PASPA0 to SCL and PASPA1 to SDA */
+ par = readb(MCF_IPSBAR + MCFGPIO_PAR_FECI2C);
+ par |= 0x0f;
+ writeb(par, MCF_IPSBAR + MCFGPIO_PAR_FECI2C);
+}
+
+#endif
+
static struct platform_device *m523x_devices[] __initdata = {
&m523x_uart,
&m523x_fec,
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ &m523x_i2c,
+#endif
};
/***************************************************************************/
@@ -114,6 +157,9 @@ void __init config_BSP(char *commandp, int size)
static int __init init_BSP(void)
{
m523x_fec_init();
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ m523x_i2c_init();
+#endif
platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
return 0;
}
diff --git a/arch/m68knommu/platform/5249/config.c
b/arch/m68knommu/platform/5249/config.c
index 646f5ba..bd08542 100644
--- a/arch/m68knommu/platform/5249/config.c
+++ b/arch/m68knommu/platform/5249/config.c
@@ -16,6 +16,7 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfi2c.h>
/***************************************************************************/
@@ -37,8 +38,81 @@ static struct platform_device m5249_uart = {
.dev.platform_data = m5249_uart_platform,
};
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+static struct resource m5249_i2c0_resources[] = {
+ {
+ .start = MCFI2C_IOBASE,
+ .end = MCFI2C_IOBASE + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCF_IRQ_I2C,
+ .end = MCF_IRQ_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct resource m5249_i2c1_resources[] = {
+ {
+ .start = MCFI2C_IOBASE2,
+ .end = MCFI2C_IOBASE2 + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCFINTC2_I2C,
+ .end = MCFINTC2_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mcfi2c_platform_data m5249_i2c0_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct mcfi2c_platform_data m5249_i2c1_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct platform_device m5249_i2c[] = {
+ {
+ .name = "i2c-mcf",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(m5249_i2c0_resources),
+ .resource = m5249_i2c0_resources,
+ .dev.platform_data = &m5249_i2c0_platform_data,
+ },
+ {
+ .name = "i2c-mcf",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(m5249_i2c1_resources),
+ .resource = m5249_i2c1_resources,
+ .dev.platform_data = &m5249_i2c1_platform_data,
+ },
+};
+
+static void __init m5249_i2c_init(void)
+{
+ u32 pri;
+
+ /* first I2C controller uses regular irq setup */
+ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
+ MCF_MBAR + MCFSIM_I2CICR);
+ mcf_mapirq2imr(MCF_IRQ_I2C, MCFINTC_I2C);
+
+ /* second I2C controller is completely different */
+ pri = readl(MCF_MBAR2 + MCFSIM2_INTLEVEL8);
+ pri &= ~MCFSIM2_INTPRI_62;
+ pri |= MCFSIM2_INTPRI_I2C;
+ writel(pri, MCF_MBAR2 + MCFSIM2_INTLEVEL8);
+}
+#endif
+
static struct platform_device *m5249_devices[] __initdata = {
&m5249_uart,
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ &m5249_i2c[0],
+ &m5249_i2c[1],
+#endif
};
/***************************************************************************/
@@ -100,6 +174,9 @@ void __init config_BSP(char *commandp, int size)
mach_reset = m5249_cpu_reset;
m5249_timers_init();
m5249_uarts_init();
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ m5249_i2c_init();
+#endif
}
/***************************************************************************/
diff --git a/arch/m68knommu/platform/527x/config.c
b/arch/m68knommu/platform/527x/config.c
index fa51be1..001fa36 100644
--- a/arch/m68knommu/platform/527x/config.c
+++ b/arch/m68knommu/platform/527x/config.c
@@ -20,6 +20,7 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfi2c.h>
/***************************************************************************/
@@ -106,12 +107,67 @@ static struct platform_device m527x_fec[] = {
},
};
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+static struct resource m527x_i2c_resources[] = {
+ {
+ .start = MCFI2C_IOBASE,
+ .end = MCFI2C_IOBASE + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCFINT_VECBASE + MCFINT_I2C,
+ .end = MCFINT_VECBASE + MCFINT_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mcfi2c_platform_data m527x_i2c_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct platform_device m527x_i2c = {
+ .name = "i2c-mcf",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(m527x_i2c_resources),
+ .resource = m527x_i2c_resources,
+ .dev.platform_data = &m527x_i2c_platform_data,
+};
+
+#if defined(CONFIG_M5271)
+static void __init m527x_i2c_init(void)
+{
+ u8 par;
+
+ /* setup Port FECI2C Pin Assignment Register for I2C */
+ /* set PAR_SCL to SCL and PAR_SDA to SDA */
+ par = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
+ par |= 0x0f;
+ writeb(par, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
+}
+#endif
+#if defined(CONFIG_M5275)
+static void __init m527x_i2c_init(void)
+{
+ u16 par;
+
+ /* setup Port FECI2C Pin Assignment Register for I2C */
+ /* set PAR_SCL to SCL and PAR_SDA to SDA */
+ par = readw(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
+ par |= 0x0f;
+ writew(par, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
+}
+#endif
+#endif
+
static struct platform_device *m527x_devices[] __initdata = {
&m527x_uart,
&m527x_fec[0],
#ifdef CONFIG_FEC2
&m527x_fec[1],
#endif
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ &m527x_i2c,
+#endif
};
/***************************************************************************/
@@ -187,6 +243,10 @@ void __init config_BSP(char *commandp, int size)
mach_reset = m527x_cpu_reset;
m527x_uarts_init();
m527x_fec_init();
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ m527x_i2c_init();
+#endif
+
}
/***************************************************************************/
diff --git a/arch/m68knommu/platform/528x/config.c
b/arch/m68knommu/platform/528x/config.c
index 6e608d1..f7516d8 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68knommu/platform/528x/config.c
@@ -21,6 +21,7 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfi2c.h>
/***************************************************************************/
@@ -76,10 +77,57 @@ static struct platform_device m528x_fec = {
.resource = m528x_fec_resources,
};
+#if defined(CONFIG_GPIO_PCF857X) || defined(CONFIG_GPIO_PCF857X_MODULE)
+static struct pcf857x_platform_data pcf857x_data[] = {
+ {
+ .gpio_base = MCFGPIO_PIN_MAX,
+ },
+};
+#endif
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+static struct resource m528x_i2c_resources[] = {
+ {
+ .start = MCFI2C_IOBASE,
+ .end = MCFI2C_IOBASE + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCFINT_VECBASE + MCFINT_I2C,
+ .end = MCFINT_VECBASE + MCFINT_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mcfi2c_platform_data m528x_i2c_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct platform_device m528x_i2c = {
+ .name = "i2c-mcf",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(m528x_i2c_resources),
+ .resource = m528x_i2c_resources,
+ .dev.platform_data = &m528x_i2c_platform_data,
+};
+
+static void __init m528x_i2c_init(void)
+{
+ u16 paspar;
+
+ /* setup Port AS Pin Assignment Register for I2C */
+ /* set PASPA0 to SCL and PASPA1 to SDA */
+ paspar = __raw_readw(MCF_IPSBAR + MCF5282_GPIO_PASPAR);
+ paspar |= 0xF;
+ __raw_writew(paspar, MCF_IPSBAR + MCF5282_GPIO_PASPAR);
+}
+#endif
static struct platform_device *m528x_devices[] __initdata = {
&m528x_uart,
&m528x_fec,
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ &m528x_i2c,
+#endif
};
/***************************************************************************/
@@ -174,6 +222,9 @@ static int __init init_BSP(void)
mach_reset = m528x_cpu_reset;
m528x_uarts_init();
m528x_fec_init();
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ m528x_i2c_init();
+#endif
platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
return 0;
}
diff --git a/arch/m68knommu/platform/5307/config.c
b/arch/m68knommu/platform/5307/config.c
index 00900ac..57f51ab 100644
--- a/arch/m68knommu/platform/5307/config.c
+++ b/arch/m68knommu/platform/5307/config.c
@@ -18,6 +18,7 @@
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
#include <asm/mcfwdebug.h>
+#include <asm/mcfi2c.h>
/***************************************************************************/
@@ -47,8 +48,45 @@ static struct platform_device m5307_uart = {
.dev.platform_data = m5307_uart_platform,
};
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+static struct resource m5307_i2c_resources[] = {
+ {
+ .start = MCFI2C_IOBASE,
+ .end = MCFI2C_IOBASE + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCF_IRQ_I2C,
+ .end = MCF_IRQ_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mcfi2c_platform_data m5307_i2c_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct platform_device m5307_i2c = {
+ .name = "i2c-mcf",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(m5307_i2c_resources),
+ .resource = m5307_i2c_resources,
+ .dev.platform_data = &m5307_i2c_platform_data,
+};
+
+static void __init m5307_i2c_init(void)
+{
+ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
+ MCF_MBAR + MCFSIM_I2CICR);
+ mcf_mapirq2imr(MCF_IRQ_I2C, MCFINTC_I2C);
+}
+#endif
+
static struct platform_device *m5307_devices[] __initdata = {
&m5307_uart,
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ &m5307_i2c,
+#endif
};
/***************************************************************************/
@@ -117,7 +155,9 @@ void __init config_BSP(char *commandp, int size)
mach_reset = m5307_cpu_reset;
m5307_timers_init();
m5307_uarts_init();
-
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ m5307_i2c_init();
+#endif
/* Only support the external interrupts on their primary level */
mcf_mapirq2imr(25, MCFINTC_EINT1);
mcf_mapirq2imr(27, MCFINTC_EINT3);
diff --git a/arch/m68knommu/platform/532x/config.c
b/arch/m68knommu/platform/532x/config.c
index d632948..7a0f14e 100644
--- a/arch/m68knommu/platform/532x/config.c
+++ b/arch/m68knommu/platform/532x/config.c
@@ -27,6 +27,7 @@
#include <asm/mcfuart.h>
#include <asm/mcfdma.h>
#include <asm/mcfwdebug.h>
+#include <asm/mcfi2c.h>
/***************************************************************************/
@@ -82,9 +83,50 @@ static struct platform_device m532x_fec = {
.resource = m532x_fec_resources,
};
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+static struct resource m532x_i2c_resources[] = {
+ {
+ .start = MCFI2C_IOBASE,
+ .end = MCFI2C_IOBASE + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCFINT_VECBASE + MCFINT_I2C,
+ .end = MCFINT_VECBASE + MCFINT_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mcfi2c_platform_data m532x_i2c_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct platform_device m532x_i2c = {
+ .name = "i2c-mcf",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(m532x_i2c_resources),
+ .resource = m532x_i2c_resources,
+ .dev.platform_data = &m532x_i2c_platform_data,
+};
+
+static void __init m532x_i2c_init(void)
+{
+ u8 par;
+
+ /* setup Port AS Pin Assignment Register for I2C */
+ /* set PASPA0 to SCL and PASPA1 to SDA */
+ par = __raw_readb(MCF_GPIO_PAR_FECI2C);
+ par |= 0x0f;
+ __raw_writeb(par, MCF_GPIO_PAR_FECI2C);
+}
+#endif
+
static struct platform_device *m532x_devices[] __initdata = {
&m532x_uart,
&m532x_fec,
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ &m532x_i2c,
+#endif
};
/***************************************************************************/
@@ -158,6 +200,9 @@ static int __init init_BSP(void)
{
m532x_uarts_init();
m532x_fec_init();
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ m532x_i2c_init();
+#endif
platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices));
return 0;
}
diff --git a/arch/m68knommu/platform/5407/config.c
b/arch/m68knommu/platform/5407/config.c
index 70ea789..b8ceb37 100644
--- a/arch/m68knommu/platform/5407/config.c
+++ b/arch/m68knommu/platform/5407/config.c
@@ -17,6 +17,7 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfi2c.h>
/***************************************************************************/
@@ -38,8 +39,45 @@ static struct platform_device m5407_uart = {
.dev.platform_data = m5407_uart_platform,
};
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+static struct resource m5407_i2c_resources[] = {
+ {
+ .start = MCFI2C_IOBASE,
+ .end = MCFI2C_IOBASE + MCFI2C_IOSIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = MCF_IRQ_I2C,
+ .end = MCF_IRQ_I2C,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mcfi2c_platform_data m5407_i2c_platform_data = {
+ .bitrate = 100000,
+};
+
+static struct platform_device m5407_i2c = {
+ .name = "i2c-mcf",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(m5407_i2c_resources),
+ .resource = m5407_i2c_resources,
+ .dev.platform_data = &m5407_i2c_platform_data,
+};
+
+static void __init m5407_i2c_init(void)
+{
+ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
+ MCF_MBAR + MCFSIM_I2CICR);
+ mcf_mapirq2imr(MCF_IRQ_I2C, MCFINTC_I2C);
+}
+#endif
+
static struct platform_device *m5407_devices[] __initdata = {
&m5407_uart,
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ &m5407_i2c,
+#endif
};
/***************************************************************************/
@@ -101,6 +139,9 @@ void __init config_BSP(char *commandp, int size)
mach_reset = m5407_cpu_reset;
m5407_timers_init();
m5407_uarts_init();
+#if defined(CONFIG_I2C_MCF) || defined(CONFIG_I2C_MCF_MODULE)
+ m5407_i2c_init();
+#endif
/* Only support the external interrupts on their primary level */
mcf_mapirq2imr(25, MCFINTC_EINT1);
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