Dear all,

sorry to be off topic with this HW-related post, but i guess some HW developer can benefit from it.
Seems i have found one of the evil issue of the SDRAM.

This is my first project with an SDRAM (MT48LC4M32B2) and with Coldfire MCF5307.

Since my problem was on SDRAM, and only from time to time i was getting bad reads, i operated in steps:

1 - i read on Micron SDRAM/DDR wiring application notes some suggestions, one of them was to use series termination resistors (22 ohm) on SDRAM control signals (SCAS, SRAS, CAS etc), but avoiding resistors-networks for this. So i removed completely the 22ohm serial terminator resistors net, since my tracks are very short i excluded them and shorted the tracks. Nothing was changed, always a very high number of errors on the memory test. But i excluded 1 possible cause

2 - i read that BUS_CLK signal wired to the SDRAM, if bad wired, can get glitches, so should wired quite separated from the other SDRAM control signals. I isolated that wire, but nothing has changed in better still.

3 - i noticed though gdb debugger that many read errors was in the first bits, from D0 to D6 ..... I used some pull-up/down resistors to configure startup D0:D6, for BUS_CLK, PLL, and CS0 initial setup at reset. Removed the resistors i didn't get any error anymore. 16 Mbytes are written and read successfully every time. Then i read on Coldfire MCF5307 datasheet that they suggest to use high impedance drivers (open collector stuff) for this purpose. I will use some transistors for this.

I am still not 100% sure that i found the cause. I will retry to test tomorrow. But since SDRAM is really well soldered now, wiring issues @ 40Mhz should not be critical in any case, probably this was the major issue.

Well, i hope to be soon on the run with uClinux running.
Thanks again,

Best regards,

Angelo













Greg Ungerer wrote:

Hi Angelo,

angelo wrote:
i have my own custom board, MCF5307, oscillator is 40Mhz, core clock (X2 is 80Mhz), 4Mb Flash (16bit words flash) and 16M SDRAM. I am trying to boot a 2.6 kernel.

After boot loader is started from the flash (i am using Colilo) the flash is remapped at 0xffc00000.

Then, from Colilo, i load the kernel (image.bin) in the SDRAM, copying it at 0x400. I dumped the SDRAM memory from 0x400, kernel is copied correctly.

When i launch it, (commad "g 400"), immediately the execution move to a "_fault" Colilo vector table handler, that jump to a "rescue" function that make blink some leds and do other stuffs also.

Are you absolutely sure you have your DRAM setup correctly?

Regards
Greg



Seems some kernel configuration parameters is certainly wrong. I attach "Processor Type" part of the .,config.

#
# Processor type and features
#
# CONFIG_M68328 is not set
# CONFIG_M68EZ328 is not set
# CONFIG_M68VZ328 is not set
# CONFIG_M68360 is not set
# CONFIG_M5206 is not set
# CONFIG_M5206e is not set
# CONFIG_M520x is not set
# CONFIG_M523x is not set
# CONFIG_M5249 is not set
# CONFIG_M5271 is not set
# CONFIG_M5272 is not set
# CONFIG_M5275 is not set
# CONFIG_M528x is not set
CONFIG_M5307=y
# CONFIG_M532x is not set
# CONFIG_M5407 is not set
CONFIG_COLDFIRE=y
CONFIG_CLOCK_SET=y
CONFIG_CLOCK_FREQ=80000000
CONFIG_CLOCK_DIV=2
# CONFIG_OLDMASK is not set

#
# Platform
#
# CONFIG_ARN5307 is not set
# CONFIG_M5307C3 is not set
# CONFIG_SECUREEDGEMP3 is not set
# CONFIG_CLEOPATRA is not set
# CONFIG_NETtel is not set
CONFIG_4KSTACKS=y
CONFIG_HZ=100

#
# RAM configuration
#
CONFIG_RAMBASE=0x00000000
CONFIG_RAMSIZE=0x01000000
CONFIG_VECTORBASE=0x00000000
CONFIG_KERNELBASE=0x00000400
# CONFIG_RAMAUTOBIT is not set
# CONFIG_RAM8BIT is not set
# CONFIG_RAM16BIT is not set
CONFIG_RAM32BIT=y


#
# ROM configuration
#
# CONFIG_ROM is not set
CONFIG_RAMKERNEL=y
# CONFIG_ROMKERNEL is not set
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_VIRT_TO_BUS=y

#
# Boot configuration
#
# CONFIG_UCBOOTLOADER is not set
CONFIG_ISA_DMA_API=y


Every help is  appreciated.

Many thanks,

Angelo
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