Hi David, On 02/06/11 21:27, Wooff, David wrote:
Hi, I have a number of questions regarding missed interrupts, since I think I could be suffering from a problem which may be explained by an occasional missed interrupt: - How can an interrupt be missed from a GPIO interrupt i.e. if the interrupt is level sensitive and is not serviced then could it actually be missed?
If interrupts where disabled at the CPU (in a locked region of code) and the level went away before interrupts where again enabled at the CPU it may be possible to lose it. This is very dependent on your CPU and its GPIO and interrupt logic. You would need to consult the documentation for your specific SoC.
- Is there any kernel logging or debug I can use to prove one way or another that this is my problem?
Will depend on whether your specific hardware gives any indication that this type of event has happened. Regards Greg ------------------------------------------------------------------------ Greg Ungerer -- Principal Engineer EMAIL: g...@snapgear.com SnapGear Group, McAfee PHONE: +61 7 3435 2888 8 Gardner Close FAX: +61 7 3217 5323 Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com _______________________________________________ uClinux-dev mailing list uClinux-dev@uclinux.org http://mailman.uclinux.org/mailman/listinfo/uclinux-dev This message was resent by uclinux-dev@uclinux.org To unsubscribe see: http://mailman.uclinux.org/mailman/options/uclinux-dev
