Hi Experts.
Is there a kind of "official" way to set aside one of the available
cores in an SMP system from the Linux OS to do deeply embedded
extremely-low-latency stuff in a kind of single task "main loop" type
environment ? I.e. creating a true coprocessor from an SMP hardware.
Some of the problems that come in ind here include:
- how to make the Linux initialization ignore one of the available
cores or free a core later on ?
- how to have a Linux task start the free running main loop ?
- how to assign certain interrupts to that core and have ISRs run
there only dedicatedly interrupting the "main loop" and not ever being
blocked by any Linux activity ?
- what about MMU issues ?
For example I (e.g.) would like a (now rather cheap) standard quadcore
ARM Cortex A9 processor chip and modify a Debian distribution in a way
that support this stuff.
Thanks,
-Michael
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