Marc Hoffman wrote:

>   2. hardware dispatches to ex_trap_c unless otherwise handled
>   3. ex_trap_c, modifies the LVL5 hardware event handler so no
>      hardware events can occur until the exception finishes (correct)?
>      then the exception is deferred to LVL5.

Actually it's only modified so that we can transfer control from an 
exception context to an interrupt context.  It's restored immediately in 
_exception_to_level5.

We can't really run kernel code in an exception context, so we chose 
IRQ5 as it's the highest-priority interrupt and can't be interrupted 
other than by another exception.  This only happens for actual 
exceptions though: for things like syscalls, we transfer to a 
low-priority IRQ15 context which can be interrupted.

CPLB faults must be handled in an exception context since they can arise 
from kernel code running in an IRQ5 context.  The handler code for this 
must be written with special care so as to not cause additional exceptions.


Bernd
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