Josh, I'm glad that I answered on most of yours questions. If you need some more information, don't hesitate to contact with me.
104MHz fifo bus in -> cross clock fifo to 26 MHz -> vita tx deframer -> > paced tx dsp -> out to dac > in from adc -> paced rx dsp -> vita rx deframer -> cross clock fifo to > 104 MHz -> 104 MHz fifo bus out According to your idea. I think that this is fine, but are you're sure that 26MHz is enough for DSP calculations? In N2x0 DSP clock frequency was twice higher than CPU clock. Regards, Andrew Karpenkov
