On Tue, Dec 22, 2009 at 7:29 PM, Benjamin Henrion <b...@udev.org> wrote: > UrJTAG segfaults when I try to detect the flash: > > ================================================ > jtag> cable ARM-USB-OCD > Connected to libftdi driver. > jtag> detect > IR length: 8 > Chain length: 1 > Device Id: 00010100011100010010000101111111 (0x000000001471217F) > Manufacturer: Broadcom > Part(0): BCM4712 > Stepping: Ver 1 > Filename: /usr/share/urjtag/broadcom/bcm4712/bcm4712 > jtag> discovery > Detecting IR length ... 8 > Detecting DR length for IR 11111111 ... 1 > Detecting DR length for IR 00000000 ... 594 > Detecting DR length for IR 00000001 ... 32 > Detecting DR length for IR 00000010 ... 594 > Detecting DR length for IR 00000011 ... 32 > Detecting DR length for IR 00000100 ... 1 > Detecting DR length for IR 00000101 ... 1 > Detecting DR length for IR 00000110 ... 1 > Detecting DR length for IR 00000111 ... 1 > Detecting DR length for IR 00001000 ... 32 > Detecting DR length for IR 00001001 ... 32 > Detecting DR length for IR 00001010 ... 32 > Detecting DR length for IR 00001011 ... 96 > Detecting DR length for IR 00001100 ... 1 > Detecting DR length for IR 00001101 ... 1 > [...] > Detecting DR length for IR 11111010 ... 1 > Detecting DR length for IR 11111011 ... 1 > Detecting DR length for IR 11111100 ... 1 > Detecting DR length for IR 11111101 ... 1 > Detecting DR length for IR 11111110 ... 1 > jtag> initbus ejtag_dma > jtag> print > No. Manufacturer Part Stepping > Instruction Register > ------------------------------------------------------------------------------------------------------------------ > 0 Broadcom BCM4712 Ver 1 BYPASS > BR > > Active bus: > *0: EJTAG compatible bus driver via DMA (JTAG part No. 0) > start: 0x00000000, length: 0x1E000000, data width: 32 bit, > (USEG : User addresses) > start: 0x1E000000, length: 0x02000000, data width: 16 bit, > (FLASH : Addresses in flash (boot=0x1FC000000)) > start: 0x20000000, length: 0x60000000, data width: 32 bit, > (USEG : User addresses) > start: 0x80000000, length: 0x20000000, data width: 32 bit, > (KSEG0: Kernel Unmapped Cached) > start: 0xA0000000, length: 0x20000000, data width: 32 bit, > (KSEG1: Kernel Unmapped Uncached) > start: 0xC0000000, length: 0x20000000, data width: 32 bit, > (SSEG : Supervisor Mapped) > start: 0xE0000000, length: 0x20000000, data width: 32 bit, > (KSEG3: Kernel Mapped) > jtag> detectflash 0x1E000000 > chain.c(149) Part 0 without active instruction > Segmentation fault > zoo...@buzek /home/zoobab/soft/jtagnight/urjtag-0.10 [82]$ > ================================================ > > Any idea?
I haven't fooled with the ejtag stuff in urjtag, but I think you may be bumping up against MIPS addressing and the TLB. It's not clear if you're supposed to provide a virtual address or a physical one with the detectflash command, in the old old openocd "jtag" code it used to depend on the bus driver. In MIPS virtual addresses the top 3 bits tell you what the rules are for the access. 0x1e000000 virtual would fall into the user space which requires a TLB lookup. The cpu core inside the part will throw an TLB exception if there's not hit in the TLB (which is by default uninitialized). 0xbe000000 is in the uncached, unmapped (no TLB) section called KSEG1. In KSEG1 the physical address is the same as the virtual address with the top 3 bits forced to 0. The MIPS boot address is in KSEG1 @ 0xbfc00000 ------------------------------------------------------------------------------ This SF.Net email is sponsored by the Verizon Developer Community Take advantage of Verizon's best-in-class app development support A streamlined, 14 day to market process makes app distribution fast and easy Join now and get one step closer to millions of Verizon customers http://p.sf.net/sfu/verizon-dev2dev _______________________________________________ UrJTAG-development mailing list UrJTAG-development@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/urjtag-development
