Hi Ran, Try the 'pld load' command within urjtag, that uses a binary file. It supports some FPGAs, you'll have to check if you are using one of the supported ones.
I've used this with Xilinx 6 devices and the .bit file generated by Xilinx ISE. I don't know what other devices it works with. Cheers, Ralph. On Wed, 4 Feb 2015 23:17:10 +0200 Ran Shalit <ransha...@gmail.com> wrote: > Hello, > > I see that urjtag uses svf as format for loading FPGA. > Do I need to convert .bin format to svf in order to load file to FPGA > using urjtag? > > Thank you, > Ran > > ------------------------------------------------------------------------------ > Dive into the World of Parallel Programming. The Go Parallel Website, > sponsored by Intel and developed in partnership with Slashdot Media, is your > hub for all things parallel software development, from weekly thought > leadership blogs to news, videos, case studies, tutorials and more. Take a > look and join the conversation now. http://goparallel.sourceforge.net/ > _______________________________________________ > UrJTAG-development mailing list > UrJTAG-development@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/urjtag-development ------------------------------------------------------------------------------ Dive into the World of Parallel Programming. The Go Parallel Website, sponsored by Intel and developed in partnership with Slashdot Media, is your hub for all things parallel software development, from weekly thought leadership blogs to news, videos, case studies, tutorials and more. Take a look and join the conversation now. http://goparallel.sourceforge.net/ _______________________________________________ UrJTAG-development mailing list UrJTAG-development@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/urjtag-development
