Hi,


*Please send Resume to  [email protected]
<[email protected]>*



*Mask Design*

Location: Hillsboro, OR

Duration: Long Term



Manditory skills

*1.      14nm*

*2.      Genesys, Genoa*

*3.      Voltage regulators, LDO*



At least 4 – 8 years experience in understanding and Independent handling
of various Analog and Mixed Signal blocks such as LDO,  Switching
Regulators, Data Converters,  PLL, SerDes, LVDS and top level layout
integration of AMS blocks.

Good Understanding of deep sub-micron layout techniques and issues in CMOS
process technology nodes like 14nm,22nm, 16nm FinFET technologies

Experience in Genesys / Genoa layout editor, Aapr flow, Helix etc

Good debugging skills in all physical verification checks like LVS, DRC,
DFM, ANTENNA, ERC, SOFT, OPC etc.

Deep understanding of reliability analysis in layout like EM, IR drop,
latch-up, ESD etc using Apache tools

Should have good knowledge of CMOS, FinFET process and fabrication

Knowledge of scripting languages such as Perl/Tcl and Skill is a plus.

Full-chip integration and verification experience

Good team player with excellent communication skills, interfacing with the
circuit team

-          Layout design, Verification, Post-layout fixes and sign-off of
high performance of Analog and Mixed Signal blocks, and IO / High Speed IO
blocks

-          Mask Design team lead for the client engagement

-          Interface with the Circuit Design team at Onsite

Proficiency in using industry standard EDA tools like Cadence (Virtuoso-L,
Virtuoso-XL, PVS & QRC), Mentor Graphics (Calibre & XRC) , Hercules










Best Regards

Ankit Kumar Sagwal

IDC Technologies Inc.

E-Mail: *[email protected]* <[email protected]>

408-457-9381 Ext:4030

Hangout: ankit121.rgtalent

Yahoo: ankitsagwal121

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