Hello, Hope you are doing great.
Please review the requirement and if you find it matching your profile then send me your updated resume ASAP *Title: VLSI Tech Lead/Verification Engineer* *Location: Hudson, MA* *Duration: 12+ Months* *Job Description: * · Physical Design Engineers. Block level implementation of one or more blocks, RTL to GDSII. Complexity is more in terms power grids and UPF, managing multiple power domains etc. These will be small blocks. Top level implementation engineer. Familiar with design timing, Macro placement, IO placement · OVM/UVM/SAOLA skills Regards Ashish Gupta 1351 McCarthy Boulevard, Suit 116, Milpitas, CA, USA, 95035 *Phone* : 408-418-5779 ex 253 *Yahoo, Hangouts* : ashish.recruiter12 *Email* : ashish.gu...@idctechnologies.com *URL* : WWW.idctechnologies.com <http://www.idctechnologies.com/> -- You received this message because you are subscribed to the Google Groups "US_IT.Groups" group. To unsubscribe from this group and stop receiving emails from it, send an email to us_itgroups+unsubscr...@googlegroups.com. To post to this group, send email to us_itgroups@googlegroups.com. Visit this group at https://groups.google.com/group/us_itgroups. For more options, visit https://groups.google.com/d/optout.
