Hi Hope you doing great.....
Please find the requirement below, and provide your updated profile ASAP..@ [email protected] and [email protected] <[email protected]>*JD:* Role: VLSI Digital Designer Location: Santa Clara - California *Duration: *Long term *Client: Wipro* Qualifications Minimum Requirements: - Bachelor's degree and 10 years of experience or a Master's degree in Electrical Engineering, Computer Engineering or a related discipline and 8 years of experience in the following areas: - Firm understanding of digital electronics, logic design and verification - Expert in digital design methodologies and tool flow - Expert in RTL, Verilog and System Verilog - Knowledge of synthesis and static timing analysis - Knowledge of verification methodologies - Knowledge of DFT methodologies - Knowledge of UVM Job Description Analyze Coverage, and implement RTL and test bench changes for coverage improvement Working with pre-Silicon validation engineers to develop cluster level directed/random tests and environments Working with the Physical Design (Layout) team on Synthesis, Formal Verification and Timing Convergence *Best Regards * *Rajinder Singh* | SYSMIND, LLC Technical Recruiter [image: https://newoldstamp.com/editor/profilePictures/profile-b15c8fc3ea4630e2ca604f11e3e951c7-41898.png] Phone: 609-897-9670 x 2190 Email: [email protected] Website: sysmind.com Address: 38 Washington Road, Princeton Junction, NJ 08550 -- You received this message because you are subscribed to the Google Groups "US_IT.Groups" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send email to [email protected]. Visit this group at https://groups.google.com/group/us_itgroups. For more options, visit https://groups.google.com/d/optout.
