On 4/27/06, Jonas Sundström <[EMAIL PROTECTED]> wrote: > "Dmitri Nikulin" <[EMAIL PROTECTED]> wrote: > ... > > Worthy archs are Alpha, Sparc (32 and 64), AMD64, i386, > > PowerPC, POWER5, IA64. The rest is not very useful. > > Am I missing one? Can you SMP ARM or MIPS? > > I believe these duals (and the quads too?) are used in Cisco systems: > http://www.broadcom.com/products/Data-Telecom-Networks/Communications-Processors > > NetBSD's sbmips port targets Broadcom's dualcore evaluation board. > > Cavium seem to be offering some interesting multicore chips: > http://www.cavium.com/newsevents_OCTEONMIPS64.html
That's impressive, but how well would a 16-core CPU scale in terms of bus and memory utilization anyway? The value of packing more cores in runs thin pretty quickly, especially without sophisticated interconnects like HyperTransport and the AMD64 on-CPU memory controller. So you pay exponentially more for only a logarithmically higher throughput, with potential *losses* due to kernel SMP scalability (which is still a major problem in NetBSD's SMP). Unless I'm really missing something about their architecture. -- Dmitri Nikulin
