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Today's Topics:

   1. Re: Regarding 10Mhz External Clock for USRP2 (Josh Blum)
   2. Re: UHD Announcement - March 18th 2011 (Josh Blum)
   3. Re: [Discuss-gnuradio] Write registers on USRP2 FPGA (Nick Foster)
   4. RSSI from WBX daughter board (Abid Ullah)
   5. Re: Write registers on USRP2 FPGA (Vladimir Negnevitsky)
   6. Re: RSSI from WBX daughter board (Matt Ettus)
   7. Re: [Discuss-gnuradio] USRP2 with XCVR- External Clock
      Setting (Nick Foster)


----------------------------------------------------------------------

Message: 1
Date: Mon, 21 Mar 2011 10:14:14 -0700
From: Josh Blum <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] Regarding 10Mhz External Clock for USRP2
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1



On 03/21/2011 09:37 AM, abhinav anand wrote:
> Hi Josh,
> 
> thanks for the pointer. I used below code to sync to external 10Mhz clock.
> I see the LED-E is up now when I connect the 10Mhz clock. Is there anything
> else left out to be set in the code??
> 

It looks good to me.

> <code snippet>
> *
> uhd::clock_config_t clock_config;
> std::string args ("192.168.10.2");
> 
> uhd::device_addr_t dev_addr;
> dev_addr["addr"] = args.c_str();
> 
> 
> clock_config.ref_source = uhd::clock_config_t::REF_SMA;
> clock_config.pps_source = uhd::clock_config_t::PPS_SMA;
> clock_config.pps_polarity = uhd::clock_config_t::PPS_POS;
> 
> uhd::usrp::single_usrp::sptr dev = uhd::usrp::single_usrp::make(dev_addr);
> dev->set_clock_config(clock_config, 0);

For convenience you can do
dev->set_clock_config(uhd::clock_config_t::external(), 0);

-Josh



------------------------------

Message: 2
Date: Mon, 21 Mar 2011 10:34:48 -0700
From: Josh Blum <[email protected]>
To: Pol Henarejos <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] UHD Announcement - March 18th 2011
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1



On 03/21/2011 02:13 AM, Pol Henarejos wrote:
> Dear list,
> 
> I pulled my directory but I am unable to compile UHD. It errors me
> 
> 3>..\..\lib\transport\libusb1_zero_copy.cpp(202) : error C2440: '=' : no
> se puede realizar la conversi?n de 'void (__cdecl *)(libusb_transfer *)'
> a 'libusb_transfer_cb_fn'
> 3>        Esta conversi?n requiere reinterpret_cast, conversi?n de
> estilo de C o conversi?n de estilo de funci?n
> 
> which means
> 
> "unable to convert 'void (__cdecl *)(libusb_transfer *)' to
> 'libusb_transfer_cb_fn'. It requires a reinterpret_cast, C-style
> conversion or function-style conversion"
> 

The function cast has been fixed. Pull the latest code to get the fix.

-Josh



------------------------------

Message: 3
Date: Mon, 21 Mar 2011 10:53:22 -0700
From: Nick Foster <[email protected]>
To: Eduardo Lloret Fuentes <[email protected]>
Cc: [email protected]
Subject: Re: [USRP-users] [Discuss-gnuradio] Write registers on USRP2
        FPGA
Message-ID: <1300730002.2408.10.camel@crapshoot>
Content-Type: text/plain; charset="UTF-8"

On Mon, 2011-03-21 at 14:35 +0100, Eduardo Lloret Fuentes wrote:
> Hello,
> 
> Thanks for the info about those methods, they seem to be very useful
> for me.
> 
> You were right, what I am trying to write are the FPGA registers. But
> I mean the registers of my own design. I added a module into the
> u2_rev3.v file and I would like to modify the value of some registers
> of this design. I only mentioned I2C and SPI standards because I
> thought they were usually used to modify the registers values.
> 
> Now, another question comes to my mind. How could I get the 32-bit
> aligned address of a register from the verilog code?
> 
> A lot of thanks for your help and time.

You'll have to add your registers to the settings registers and address
them similarly in order to be able to access them via the Wishbone bus.
Look for "setting_reg" in u2_core.v. Then take a look at the firmware
and host code (look at gnuradio/usrp2/lib/memory_map.h, specifically the
section for slave 7) to see what the 32-bit addresses are for comparable
settings registers.

--n

> 
> Edu.
> 
> 2011/3/17 Nick Foster <[email protected]>
>         On Thu, 2011-03-17 at 14:10 +0100, Eduardo Lloret Fuentes
>         wrote:
>         > Hello!
>         >
>         > I was successful trying to add my own FPGA code into the
>         original FPGA
>         > project. I just added a module into the u2_rev3.v and bypass
>         the DSP
>         > pipeline. So, all the original FPGA code is there and the
>         firmware is
>         > running. Now, I would like to modify some registers of my
>         own FPGA
>         > design. Maybe using the I2C or the SPI standards already
>         implemented
>         > via ethernet.
>         >
>         > I read that for the USRP there is a command, "usrper
>         i2c_write
>         > i2c_addr <hex-string>" that can be used to modify some
>         existing
>         > registers.
>         >
>         > Is there anything similar for USRP2?
>         >
>         > Is there any other way to modify an existing register (from
>         the
>         > original code) or a custom register (from my own code) via
>         ethernet?
>         
>         
>         There are peek32 and poke32, which are both methods in the
>         USRP2 lib and
>         are brought out to the Python interface. These allow you to
>         read and
>         write to FPGA registers. I assume you're not really trying to
>         write I2C
>         or SPI, but to write to FPGA registers -- if you want to
>         access the I2C
>         or SPI buses, you'll have to either modify the USRP2 firmware
>         or use UHD
>         and write some custom code.
>         
>         --n
>         
>         >
>         > I would like to clarify that I am using the gnuradio master
>         branch but
>         > if there is a way to write these registers using the UHD
>         driver it is
>         > also quite interesting for me.
>         >
>         > A lot of thanks in advance.
>         >
>         > Eduardo.
>         
>         > _______________________________________________
>         > Discuss-gnuradio mailing list
>         > [email protected]
>         > http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
>         
>         
> 





------------------------------

Message: 4
Date: Mon, 21 Mar 2011 15:27:59 -0400
From: Abid Ullah <[email protected]>
To: [email protected]
Subject: [USRP-users] RSSI from WBX daughter board
Message-ID:
        <[email protected]>
Content-Type: text/plain; charset="iso-8859-1"

Hi
    I am interested in extracting the RSSI from WBX daughter board. I know
that it can be done for the XCVR daughter board.
Is it possible to extract RSSI from WBX daughter board in some kind of a
similar way.

Currently I am using USRP2_spectrum sense.py for energy detection for
position location but the AGC gain is changing the measurement alot. I will
really appreciate if some one know how to set the AGC gain to a fix value on
the WBX daughter board.  Or get RSSI before the AGC gain.


Abid
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Message: 5
Date: Tue, 22 Mar 2011 10:18:25 +1100
From: Vladimir Negnevitsky <[email protected]>
To: Eduardo Lloret Fuentes <[email protected]>,
        [email protected]
Subject: Re: [USRP-users] Write registers on USRP2 FPGA
Message-ID:
        <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1

I put my DSP chain inside u2_core.v rather than u2_rev3.v . I
recommend moving your modules into u2_core and bypassing the RX/TX DSP
chains in there; this way you have direct access to the Wishbone bus
and other modules.

I agree entirely with what Nick Foster posted most recently; that's
exactly what I'm doing in my design. A few more details on this
approach:

-- On line 149, below the other "localparam" declarations, you'll need
to add "localparam SR_MY_REGS_CONTROL 240" or similar. This gives you
the addresses 240 - 255 on the Wishbone Slave 7 (i.e. potentially 16
32-bit addresses which you can reach from the ZPU).

-- Further down, create your settings registers, in the following form:

          setting_reg #(.my_addr(SR_MY_REGS_CONTROL+0)) sr_my_regs_a
          (.clk(dsp_clk),.rst(dsp_rst), .strobe(set_stb_dsp),
          .addr(set_addr_dsp),
.in(set_data_dsp),.out(wires_to_my_custom_modules),.changed());

          setting_reg #(.my_addr(SR_MY_REGS_CONTROL+1)) sr_my_regs_b
          (.clk(dsp_clk),.rst(dsp_rst), .strobe(set_stb_dsp),
          .addr(set_addr_dsp),
.in(set_data_dsp),.out(wires_to_my_custom_modules_2),.changed());

          etc.

Note the way the registers are addressed relative to the declaration
made earlier. Also, I'm using the DSP clock for my registers but you
may not need it, in which case follow the template of some of the
other registers connected to the Wishbone clock.

-- Then in memory_map.h (make sure to modify the USRP2 one, not the
NXXX) around Line 230, add an entry like

#define SR_MY_REGS_CTRL 240

And further down, declare a const structure:

typedef struct {
  volatile uint32_t     params_a;
  volatile uint32_t     params_b;
} sr_my_regs_ctrl_t;

#define sr_my_regs_ctrl ((sr_my_regs_ctrl_t *) _SR_ADDR(SR_MY_REGS_CTRL));

Now, in firmware, to write to sr_my_regs_a, you would use
sr_my_regs_ctrl->params_a = 0xffffffff; (for example you could add
that to u2_init.c to set the register upon boot-up); to write to
sr_my_regs_b you would use sr_my_regs_ctrl->params_b = 0xffffffff .
You should understand what the above #define is doing before going too
much further. Since the structure is declared sequentially in memory,
params_a points to the first register, params_b points to the second
register, etc.

Getting the host to tell the USRP2 to write to these registers depends
on you declaring the correct memory locations when you call poke32().
I haven't done much with the host yet so I can't help you here.

Regards,

Vlad

>> On 18 March 2011 00:10, Eduardo Lloret Fuentes <[email protected]> wrote:
>> > Hello!
>> >
>> > I was successful trying to add my own FPGA code into the original FPGA
>> > project. I just added a module into the u2_rev3.v and bypass the DSP
>> > pipeline. So, all the original FPGA code is there and the firmware is
>> > running. Now, I would like to modify some registers of my own FPGA
>> > design.
>> > Maybe using the I2C or the SPI standards already implemented via
>> > ethernet.
>> >
>> > I read that for the USRP there is a command, "usrper i2c_write i2c_addr
>> > <hex-string>" that can be used to modify some existing registers.
>> >
>> > Is there anything similar for USRP2?
>> >
>> > Is there any other way to modify an existing register (from the original
>> > code) or a custom register (from my own code) via ethernet?
>> >
>> > I would like to clarify that I am using the gnuradio master branch but
>> > if
>> > there is a way to write these registers using the UHD driver it is also
>> > quite interesting for me.
>> >
>> > A lot of thanks in advance.
>> >
>> > Eduardo.
>> >
>> > _______________________________________________
>> > USRP-users mailing list
>> > [email protected]
>> > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>> >
>> >
>
>



------------------------------

Message: 6
Date: Mon, 21 Mar 2011 17:13:09 -0700
From: Matt Ettus <[email protected]>
To: Abid Ullah <[email protected]>
Cc: [email protected]
Subject: Re: [USRP-users] RSSI from WBX daughter board
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1

On 03/21/2011 12:27 PM, Abid Ullah wrote:
> Hi
>     I am interested in extracting the RSSI from WBX daughter board. I
> know that it can be done for the XCVR daughter board.
> Is it possible to extract RSSI from WBX daughter board in some kind of a
> similar way.
> 
> Currently I am using USRP2_spectrum sense.py for energy detection for
> position location but the AGC gain is changing the measurement alot. I
> will really appreciate if some one know how to set the AGC gain to a fix
> value on the WBX daughter board.  Or get RSSI before the AGC gain.


The WBX only has fixed gain control on receive, so there is no AGC to
mess with your measurements.

Matt



------------------------------

Message: 7
Date: Tue, 22 Mar 2011 09:57:28 -0700
From: Nick Foster <[email protected]>
To: Vlad Stoica <[email protected]>
Cc: [email protected]
Subject: Re: [USRP-users] [Discuss-gnuradio] USRP2 with XCVR- External
        Clock   Setting
Message-ID: <1300813048.12468.4.camel@crapshoot>
Content-Type: text/plain; charset="UTF-8"

On Tue, 2011-03-22 at 13:42 +0100, Vlad Stoica wrote:
> Hello
> 
> I want to implement an OFDM Transmission at 2.45GHz, and the internal USRP2 
> oscillator has a deviation at about 22kHz. That is too much and interrupts 
> the (software) synchronisation.
> 
> Because of that i want to use an external clock 10MHz with the USPR2.
> It shoult be about 5dBm - 15dBm and with an amplitude about Upp = 3V.
> An square wave should be best, but also a sinus should do it.
> 
> The question is: Where should i adjust the settings so the USRP2
> will use the external clock ?
> 
> I use it with the Matlab Simulink and the standard firmware image.

Currently the Simulink driver does not support synchronizing to an
external clock. You'll have to wait for Mathworks to release their
UHD-compatible driver.

That said, the USRP2's oscillator is pretty stable, especially after the
device has been on for a while. You'll probably be okay
adding/subtracting 22kHz from the center frequency at which you operate.

--n

> 
> I appreciate your hints
> Vlad
> 
> 
> 
> 
> 
> 





------------------------------

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