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Today's Topics:
1. Problem with Transmitting bits (manjusha)
2. Using Metadata (Tim Schuschies)
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Message: 1
Date: Fri, 15 Mar 2013 19:15:01 +0000 (UTC)
From: manjusha <[email protected]>
To: [email protected]
Subject: [USRP-users] Problem with Transmitting bits
Message-ID: <[email protected]>
Content-Type: text/plain; charset=us-ascii
Hello Everyone,
I am trying to send bits from my Transmitter to Receiver.Attached is the
transmitter.As you can see there are two file sinks.So,here are the questions i
have..
1.When i write 1 bit to my msg_tx file i get to see no transmission over the
USRP (I saw it with the help of other file sink). And it continues to show no
transmission until i have 6 bits on the msg_tx file.It works when i have 7 and
more bits.I thought may be it wants to transmit a Byte(8 bits) of data.But,it
transmits 7 bits also.Please explain why it is so..
2.The same with 9 bits of data on my msg_tx file,it transmits only 8 bits of
data and leaves other bits .It continues continues to do this until i have 14
bits on my file..i.e for 14 bits,it transmits 8 bits only and leaves the other 6
bits ..works fine for 15 and 16 bits.
3.When i put my File source to 'NO REPEAT' the transmission is none for any
number of bits.Do i have make any changes in the .grc file for this to
work?Please explain.
Thanks,
Manjusha
------------------------------
Message: 2
Date: Sat, 16 Mar 2013 13:04:23 +0100
From: Tim Schuschies <[email protected]>
To: [email protected]
Subject: [USRP-users] Using Metadata
Message-ID:
<caov+zhv16aicvvedapndsovohexhl-j_r2xy8_wct420z9l...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
Hi All,
I am still trying to use the metadata of the tx-streamer. I know that I
probably can use the CID field because it's not used yet. Implementing that
in UHD seems not to be problem. I've already done this. But now I'm at a
point I simply do not know how to go on. The problem is that I still don't
know how I can use the data of the VRT header within my FPGA design. I
tried to find the data by sending a known value to USRP and observing the
signals I thought that they could probably contain these data. I observed
all outputs of the VITA_TX_DEFRAMER with a debugger. I don't find anything
useful. It's still quite important for me to get this work.
Can anyone help me, please?
Is the processing of the CID field already implemented?
Which are the signals the data are assigned to?
Is it possible to assign the 64bit CID field to a 64bit wide bus in the
FPGA?
If yes, how can do this?
Can anyone explain how the VITA_TX_DEFRAMER works? I tried to understand
it, but I don't get it...
Thanks a lot.
Tim
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