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Today's Topics:
1. hello (customer cate of canadiansms.com (administrator))
2. Re: hello (Josh Blum)
3. R2 N210 PPS input no longer functioning (Robert Watson)
4. Re: R2 N210 PPS input no longer functioning (Marcus D. Leech)
5. Re: Custom Block in FPGA code of USRP N210 (Matt Ettus)
6. MATLAB USRP :: verbose off? (Stan Gamla)
7. Re: MATLAB USRP :: verbose off? (Ethem Sozer)
8. WBX Oscillator (Brooke Hayden)
9. Re: WBX Oscillator ([email protected])
----------------------------------------------------------------------
Message: 1
Date: Wed, 27 Mar 2013 12:20:12 -0400
From: "customer cate of canadiansms.com (administrator)"
<[email protected]>
To: [email protected]
Subject: [USRP-users] hello
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
please can some body tell me how a can increase the mtu send and receive
buffer per frame of uhd driver object in openbts
thank you in advance left
------------------------------
Message: 2
Date: Wed, 27 Mar 2013 11:36:41 -0500
From: Josh Blum <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] hello
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1
On 03/27/2013 11:20 AM, customer cate of canadiansms.com (administrator)
wrote:
> please can some body tell me how a can increase the mtu send and receive
> buffer per frame of uhd driver object in openbts
> thank you in advance left
>
>
So, there are args you can pass into the device address at construction
time:
http://files.ettus.com/uhd_docs/manual/html/transport.html#udp-transport-sockets
I'm not sure how you would convey this to the openbts application, so in
that sense, the openbts mailing list could probably help you better.
-josh
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
------------------------------
Message: 3
Date: Wed, 27 Mar 2013 19:03:26 +0000
From: Robert Watson <[email protected]>
To: [email protected]
Subject: [USRP-users] R2 N210 PPS input no longer functioning
Message-ID:
<CAP4WT-D-xU+qAq4CGTN22Jk2ZgWO=w_ocqssnupek3hdky7...@mail.gmail.com>
Content-Type: text/plain; charset=ISO-8859-1
Hi Folks,
[apologies if this gets posted twice]
I've just upgraded my R2 N210 and previously working external
PPS/10MHz arrangement and encountered a problem. In a nutshell, no
matter what I do I "test_pps_input" can't catch my PPS input. This was
a hardware setup that was previously working (I'm actually using a
Quartzlock E8-Y GPSDO). The PPS is there - I've checked on a 'scope
and its nice and clean.
My UHD was built from the git repo and the USRP flashed with the
latest images grabbed using uhd_images_downloader.py.
The UHD build is UHD_003.005.001-55-g8488eb09 and the images are
tagged 003.005.001-release. In GNURadio I can get the clock and time
to external but if I try and sync to PPS it fails. While the clock is
switched to external, if I remove the 10MHz, the PLL unlocks which is
what I'd expect so I believe it can see the 10MHz. I've tried using
the internal PPS2 SMA (J506) and tried switching the J510 jumper from
1-2 to 2-3 without success - plus all permutations of the above =)
Have I missed something? Is there anything I should try before rolling
back to some older UHD and images?
Many thanks,
Rob.
------------------------------
Message: 4
Date: Wed, 27 Mar 2013 15:11:39 -0400
From: "Marcus D. Leech" <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] R2 N210 PPS input no longer functioning
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
> Hi Folks,
>
> [apologies if this gets posted twice]
>
> I've just upgraded my R2 N210 and previously working external
> PPS/10MHz arrangement and encountered a problem. In a nutshell, no
> matter what I do I "test_pps_input" can't catch my PPS input. This was
> a hardware setup that was previously working (I'm actually using a
> Quartzlock E8-Y GPSDO). The PPS is there - I've checked on a 'scope
> and its nice and clean.
>
> My UHD was built from the git repo and the USRP flashed with the
> latest images grabbed using uhd_images_downloader.py.
> The UHD build is UHD_003.005.001-55-g8488eb09 and the images are
> tagged 003.005.001-release. In GNURadio I can get the clock and time
> to external but if I try and sync to PPS it fails. While the clock is
> switched to external, if I remove the 10MHz, the PLL unlocks which is
> what I'd expect so I believe it can see the 10MHz. I've tried using
> the internal PPS2 SMA (J506) and tried switching the J510 jumper from
> 1-2 to 2-3 without success - plus all permutations of the above =)
>
> Have I missed something? Is there anything I should try before rolling
> back to some older UHD and images?
>
> Many thanks,
>
> Rob.
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
I would roll back, and confirm that PPS works just fine in the older
release, and then we can go from there. This is the first I've heard of
a PPS issue.
--
Marcus Leech
Principal Investigator
Shirleys Bay Radio Astronomy Consortium
http://www.sbrac.org
------------------------------
Message: 5
Date: Wed, 27 Mar 2013 21:55:19 -0700
From: Matt Ettus <[email protected]>
To: Vaibhav Vaidya <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] Custom Block in FPGA code of USRP N210
Message-ID:
<CAN=1kn-2Ph8Y=nkve1o7tcrftpmzirprdh+8zc8o9vezwv4...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
Did you XOR any other signals, like strobes, or just the data values?
Matt
On Tue, Mar 26, 2013 at 4:29 AM, Vaibhav Vaidya <[email protected]>wrote:
> Hi,
>
> I am trying to make few changes in the code of USRP 210 FPGA. I have read
> many posts that tell how to go about it.
>
> I instantiated a module that just EX-ORs the input with itself, between
> the ddc_chain and vita _rx_framer blocks. Now when I run benchmark_tx.py(on
> another computer) and benchmark_rx.py(with the modified fpga code
> ofcourse), it gets stuck.
> Moreover, I tried to run usrp_spectrum_sense.py, but it gave me the same
> output that i got on any other machine(with the default fpga code).
> The receiver should have given me zero as output.
>
> I dont know whats wrong. Please help.
>
> Thanks.
> Vaibhav
>
> --
> 28 States
> 7 Union Territories
> 1652 Languages
> 3000+ Castes
> 6 Major Religions
> 29 Major Festivals
> but still
>
> United We Stand as INDIA
> JAI HIND
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
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Message: 6
Date: Thu, 28 Mar 2013 09:55:36 +0100
From: Stan Gamla <[email protected]>
To: USRP-USERS Ettus <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: [USRP-users] MATLAB USRP :: verbose off?
Message-ID: <[email protected]>
Content-Type: text/plain; charset="iso-8859-1"
Is there a way to control the reporting that MATLAB USRP produces? In other
words, can the reports that are sent to the MATLAB command window (as red text
even though they are not errors) be limited or turned off?
Stan
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Message: 7
Date: Thu, 28 Mar 2013 11:36:48 +0000
From: Ethem Sozer <[email protected]>
To: Stan Gamla <[email protected]>, USRP-USERS Ettus
<[email protected]>
Cc: Darel Linebarger <[email protected]>
Subject: Re: [USRP-users] MATLAB USRP :: verbose off?
Message-ID:
<93d53efe258f7b40996b3005458c751d26be1...@exmb-01-ah.ad.mathworks.com>
Content-Type: text/plain; charset="us-ascii"
Hi Stan,
No. Those are generated by UHD.
Regards,
Ethem
From: Stan Gamla [mailto:[email protected]]
Sent: Thursday, March 28, 2013 4:56 AM
To: USRP-USERS Ettus
Cc: Mike McLernon; Marc Erickson; Darel Linebarger; Ethem Sozer
Subject: MATLAB USRP :: verbose off?
Is there a way to control the reporting that MATLAB USRP produces? In other
words, can the reports that are sent to the MATLAB command window (as red text
even though they are not errors) be limited or turned off?
Stan
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Message: 8
Date: Thu, 28 Mar 2013 09:44:32 -0400
From: Brooke Hayden <[email protected]>
To: [email protected]
Subject: [USRP-users] WBX Oscillator
Message-ID:
<cakv0vuhulrhore8rmowco09y1k6vju6vxonqf8hozvirctx...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
What type of oscillator does the WBX daughterboard use? I am looking to
change frequencies over time and would like to know exactly how fast I can
expect to be able to do so.
Thanks,
Brooke
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Message: 9
Date: Thu, 28 Mar 2013 09:49:06 -0400
From: [email protected]
To: <[email protected]>
Subject: Re: [USRP-users] WBX Oscillator
Message-ID: <[email protected]>
Content-Type: text/plain; charset="utf-8"
On 28 Mar 2013 09:44, Brooke Hayden wrote:
> What type of
oscillator does the WBX daughterboard use? I am looking to change
frequencies over time and would like to know exactly how fast I can
expect to be able to do so.
>
> Thanks, Brooke
It uses a PLL
synthesizer, the ADF4350, with the refclock supplied by the underlying
motherboard.
But for really-fast switching, you keep the LO frequency
constant, and use the DDC to hop around within the baseband bandwidth.
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End of USRP-users Digest, Vol 31, Issue 27
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