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Today's Topics:
1. Re: Plotting csv to gnuplot (Rog?rio Rivera)
2. Re: USRP-users Digest, Vol 31, Issue 27 (Brooke Hayden)
3. Plotting csv to gnuplot (Rog?rio Rivera)
4. Re: Purpose of 24-bit CORDIC in DDC chain? (Ian Buckley)
5. Re: High CPU utilization (100%) when streaming two concurrent
channels regardless of sample rate (Pruitt, Paul N.)
6. Re: E1XX updates for dreaded Ssssssss (Macre, William R)
7. Re: E1XX updates for dreaded Ssssssss (Philip Balister)
8. Re: E1XX updates for dreaded Ssssssss (Macre, William R)
9. Re: E1XX updates for dreaded Ssssssss (Philip Balister)
10. Re: E1XX updates for dreaded Ssssssss (Alex Gladd)
11. Re: E1XX updates for dreaded Ssssssss (Philip Balister)
12. Re: Purpose of 24-bit CORDIC in DDC chain? (Florian Schlembach)
13. Re: Purpose of 24-bit CORDIC in DDC chain? (Ian Buckley)
14. Re: Timing constraints violations using custom_dsp_rx module
(Florian Schlembach)
15. Re: Custom Block in FPGA code of USRP N210 (Florian Schlembach)
16. Digital Modulation in GRC (ZaInzAiN Jj)
17. Re: Digital Modulation in GRC (ZaInzAiN Jj)
18. Re: Purpose of 24-bit CORDIC in DDC chain? (Florian Schlembach)
19. E110 upgrade failure (Christopher Roussi)
20. Re: E110 upgrade failure (Philip Balister)
21. Re: Purpose of 24-bit CORDIC in DDC chain? (Johnathan Corgan)
22. Re: Purpose of 24-bit CORDIC in DDC chain? (Johnathan Corgan)
----------------------------------------------------------------------
Message: 1
Date: Tue, 2 Apr 2013 13:11:04 -0300
From: Rog?rio Rivera <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] Plotting csv to gnuplot
Message-ID:
<CAP9hz1584_k06GQXy8iBnMgSOMm7tpkg5B-EvE08uvsA=c6...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
The error message was
"gnuplot> plot "newdataa.csv"
warning: Skipping unreadable file "newdataa.csv"
No data in plot"
On Tue, Apr 2, 2013 at 1:10 PM, Rog?rio Rivera <[email protected]>wrote:
> Hello USRP community
> I'm having some issues on plotting a csv datafile on gnuplot.
> I've ran the commands
> "
> gnuplot> set datafile separator ","
> gnuplot> plot "/home/mwsl-03/gnuradio/gr-uhd/examples/python/newdataa.csv"
> "
> Any help will be useful
> My csv file is attached on this e-mail
> Thanks,
> Rogerio
>
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Message: 2
Date: Tue, 2 Apr 2013 12:33:37 -0400
From: Brooke Hayden <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] USRP-users Digest, Vol 31, Issue 27
Message-ID:
<CAKv0vuFFrgnuC0SOADy3uYfU18+M5hTygkP=tvoTqKjzFYn=6...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
>
>
>
> On 28 Mar 2013 09:44, Brooke Hayden wrote:
>
> > What type of
> oscillator does the WBX daughterboard use? I am looking to change
> frequencies over time and would like to know exactly how fast I can
> expect to be able to do so.
> >
> > Thanks, Brooke
>
> It uses a PLL
> synthesizer, the ADF4350, with the refclock supplied by the underlying
> motherboard.
>
> But for really-fast switching, you keep the LO frequency
> constant, and use the DDC to hop around within the baseband bandwidth.
>
I need to change in more than just the baseband bandwidth. Like from 500
MHz to 2 GHz in steps of maybe a 100 MHz. This will occur over a chirp of
(ideally) less than a millisecond. Is the ADF4350 capable of such operation?
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Message: 3
Date: Tue, 2 Apr 2013 13:36:44 -0300
From: Rog?rio Rivera <[email protected]>
To: [email protected]
Subject: [USRP-users] Plotting csv to gnuplot
Message-ID:
<cap9hz160qu_3snm2kq8ko4pxpnaockuge5zakztu-1bfzaa...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
Hello USRP community
I'm having some issues on plotting a csv datafile on gnuplot.
I've ran the commands
"
gnuplot> set datafile separator ","
gnuplot> plot "/home/mwsl-03/gnuradio/gr-uhd/examples/python/newdataa.csv"
"
The graph i receive is somehow wrong.
Any help will be useful!!!
Thanks,
Rogerio
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------------------------------
Message: 4
Date: Tue, 2 Apr 2013 09:39:05 -0700
From: Ian Buckley <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] Purpose of 24-bit CORDIC in DDC chain?
Message-ID: <[email protected]>
Content-Type: text/plain; charset="us-ascii"
Florian,
Think of the CORDIC as a DCO and Quadrature Mixer combined.
So to expand on Marcus's answer further: There's typically 40MHz of useful
bandwidth coming from the more popular Ettus radio's such as WBX. The two half
band FIR filters plus the CIC filter create a low pass filter with programable
decimation. (Centered on DC obviously). The CORDIC allows that 40MHz of
bandwidth to be arbitrarily repositioned w.r.t the DC of the downstream lowpass
filter, thus you can in combination with the programmed decimation select a
much narrower channel from anywhere within that 40MHz.
Some example reasons why you might want to do this:
* Offset the LO of the analog mixer in the upstream analog radio from DC so
that it falls in the stop land of the low pass filter.
* Instantaneous frequency hopping
* Multi-channel receiver from a single RF analog front end.
* Extremely high precision tuning.
etc etc
-Ian
On Apr 2, 2013, at 6:57 AM, [email protected] wrote:
> On 02 Apr 2013 08:59, Florian Schlembach wrote:
>
>> I am just analysing the FPGA code of the DDC chain. I just got stuck
>> when trying to find out the purpose of the CORDIC that comes right after
>> the ADCs.
>> According to my understanding, the only purpose of the CORDIC is to add
>> a certain phase increment using an efficient multiplier-free
>> implementation. The subsequent decimation of incoming, 100 MHz sampled
>> data (dealing with N210) is then performed via the CIC and Halfband filters.
>>
>> Is that correct?
>>
>>
>> _______________________________________________
>> USRP-users mailing list
>> [email protected]
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
> It's used to do arbitrary up/downconversion, with high precision, of the
> sample stream coming off the ADC.
>
> Many daughtercards have fairly coarse tuning step size, so the CORDIC in the
> FPGA is used in those cases to tune to a precise frequency, as requested by
> the user.
>
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
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------------------------------
Message: 5
Date: Tue, 2 Apr 2013 12:51:58 -0400
From: "Pruitt, Paul N." <[email protected]>
To: <[email protected]>
Cc: [email protected]
Subject: Re: [USRP-users] High CPU utilization (100%) when streaming
two concurrent channels regardless of sample rate
Message-ID:
<f82ab11a5a3e584b8a5148146c5475410672e...@0015-its-exmb14.us.saic.com>
Content-Type: text/plain; charset="us-ascii"
> From: Josh Blum [mailto:[email protected]] On Behalf Of Josh Blum
>
> This is a four line patch to serialize the conversions, no extra
> threads: http://pastebin.com/0Q2UDB8x
>
> I will try to get back to you in the morning using something with
condition
> variables.
>
Josh,
This patch works great. CPU utilization is down to around 18-20% when
continuously streaming 2 channels at 10 MSPS each. I have been running
it all morning and have not seen any issues.
Thanks!
Paul
------------------------------
Message: 6
Date: Tue, 2 Apr 2013 22:17:44 +0000
From: "Macre, William R" <[email protected]>
To: Alex Gladd <[email protected]>, "'Philip Balister'"
<[email protected]>, "[email protected]"
<[email protected]>
Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
Message-ID:
<5e9bdf6832e57149b46d9becf6ab21510cf44...@rrc-ats-exmb2.ats.atsinnovate.com>
Content-Type: text/plain; charset="us-ascii"
All:
Does anybody know what the status is of this update for the USRP-E1XX???
Wrm
-----Original Message-----
From: USRP-users [mailto:[email protected]] On Behalf Of Alex
Gladd
Sent: Friday, March 29, 2013 4:20 PM
To: 'Philip Balister'; [email protected]
Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
We just updated one of our E110s and now it no longer finishes booting.
It gets to the point in the boot cycle where it loads the E110 FPGA image and
says "-- Configuration complete", then it appears that the system halts.
I stop receiving anything over the serial console and the Ethernet port lights
on the E110 go out.
I think my only option at this point is to pull the power plug, which will
likely compound our problems by corrupting my SD card :(
Any help would be greatly appreciated.
Thanks,
~Alex
-------------------------
Alex Gladd
Staff Engineer
Raytheon BBN Technologies
-----Original Message-----
From: Philip Balister [mailto:[email protected]]
Sent: Friday, March 29, 2013 2:38 PM
To: [email protected]; GNURadio Discussion List
Subject: [USRP-users] E1XX updates for dreaded Ssssssss
I have pushed updates into the E1XX package feeds that should resolve the Sssss
some people have been seeing. Here is a quick summary of the
changes:
* UHD 3.5.2 (includes CBX)
* Updated kernel (fpga interface timing change, Add support for CIFS and
Multicast)
* GnuRadio 3.6.4.1
You can install these with:
# opkg update
# opkg upgrade
while you are connected to the internet.
Philip
_______________________________________________
USRP-users mailing list
[email protected]
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
_______________________________________________
USRP-users mailing list
[email protected]
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
------------------------------
Message: 7
Date: Tue, 02 Apr 2013 18:47:04 -0400
From: Philip Balister <[email protected]>
To: "Macre, William R" <[email protected]>
Cc: Alex Gladd <[email protected]>, "[email protected]"
<[email protected]>
Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1
On 04/02/2013 06:17 PM, Macre, William R wrote:
>
> All:
>
> Does anybody know what the status is of this update for the USRP-E1XX???
I ran the update on a card I made from the factory instructions and it
booted fine for me.
For me to figure out what is happening to existing cards, I am going to
need more details, such as a log from the serial console up to the failure.
I have had no success finding the failure on my e100s.
Are the people having trouble all using E110's?
Philip
>
>
> Wrm
>
> -----Original Message-----
> From: USRP-users [mailto:[email protected]] On Behalf Of
> Alex Gladd
> Sent: Friday, March 29, 2013 4:20 PM
> To: 'Philip Balister'; [email protected]
> Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
>
> We just updated one of our E110s and now it no longer finishes booting.
>
> It gets to the point in the boot cycle where it loads the E110 FPGA image and
> says "-- Configuration complete", then it appears that the system halts.
> I stop receiving anything over the serial console and the Ethernet port
> lights on the E110 go out.
>
> I think my only option at this point is to pull the power plug, which will
> likely compound our problems by corrupting my SD card :(
>
> Any help would be greatly appreciated.
>
> Thanks,
> ~Alex
>
> -------------------------
> Alex Gladd
> Staff Engineer
> Raytheon BBN Technologies
>
> -----Original Message-----
> From: Philip Balister [mailto:[email protected]]
> Sent: Friday, March 29, 2013 2:38 PM
> To: [email protected]; GNURadio Discussion List
> Subject: [USRP-users] E1XX updates for dreaded Ssssssss
>
> I have pushed updates into the E1XX package feeds that should resolve the
> Sssss some people have been seeing. Here is a quick summary of the
> changes:
>
> * UHD 3.5.2 (includes CBX)
> * Updated kernel (fpga interface timing change, Add support for CIFS and
> Multicast)
> * GnuRadio 3.6.4.1
>
> You can install these with:
>
> # opkg update
> # opkg upgrade
>
> while you are connected to the internet.
>
> Philip
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
------------------------------
Message: 8
Date: Tue, 2 Apr 2013 23:03:42 +0000
From: "Macre, William R" <[email protected]>
To: Philip Balister <[email protected]>
Cc: Alex Gladd <[email protected]>, "[email protected]"
<[email protected]>
Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
Message-ID:
<5e9bdf6832e57149b46d9becf6ab21510cf44...@rrc-ats-exmb2.ats.atsinnovate.com>
Content-Type: text/plain; charset="us-ascii"
I've only seen one other usrp-email about this issue from Alex Gladd. I am
still trying to recover my microSD card that I did the opkg upgrade on. Now it
seems that the e1xx-003-make.tar.bz2 dated 11-May-2012 15:34 667M expanded on
a microSD card will not boot (see attached putty.log). I'm running out of
things to try, any suggestions?
Wrm
-----Original Message-----
From: Philip Balister [mailto:[email protected]]
Sent: Tuesday, April 02, 2013 6:47 PM
To: Macre, William R
Cc: Alex Gladd; [email protected]
Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
On 04/02/2013 06:17 PM, Macre, William R wrote:
>
> All:
>
> Does anybody know what the status is of this update for the USRP-E1XX???
I ran the update on a card I made from the factory instructions and it booted
fine for me.
For me to figure out what is happening to existing cards, I am going to need
more details, such as a log from the serial console up to the failure.
I have had no success finding the failure on my e100s.
Are the people having trouble all using E110's?
Philip
>
>
> Wrm
>
> -----Original Message-----
> From: USRP-users [mailto:[email protected]] On Behalf
> Of Alex Gladd
> Sent: Friday, March 29, 2013 4:20 PM
> To: 'Philip Balister'; [email protected]
> Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
>
> We just updated one of our E110s and now it no longer finishes booting.
>
> It gets to the point in the boot cycle where it loads the E110 FPGA image and
> says "-- Configuration complete", then it appears that the system halts.
> I stop receiving anything over the serial console and the Ethernet port
> lights on the E110 go out.
>
> I think my only option at this point is to pull the power plug, which
> will likely compound our problems by corrupting my SD card :(
>
> Any help would be greatly appreciated.
>
> Thanks,
> ~Alex
>
> -------------------------
> Alex Gladd
> Staff Engineer
> Raytheon BBN Technologies
>
> -----Original Message-----
> From: Philip Balister [mailto:[email protected]]
> Sent: Friday, March 29, 2013 2:38 PM
> To: [email protected]; GNURadio Discussion List
> Subject: [USRP-users] E1XX updates for dreaded Ssssssss
>
> I have pushed updates into the E1XX package feeds that should resolve
> the Sssss some people have been seeing. Here is a quick summary of the
> changes:
>
> * UHD 3.5.2 (includes CBX)
> * Updated kernel (fpga interface timing change, Add support for CIFS
> and
> Multicast)
> * GnuRadio 3.6.4.1
>
> You can install these with:
>
> # opkg update
> # opkg upgrade
>
> while you are connected to the internet.
>
> Philip
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
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Message: 9
Date: Tue, 02 Apr 2013 19:17:33 -0400
From: Philip Balister <[email protected]>
To: "Macre, William R" <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1
On 04/02/2013 07:03 PM, Macre, William R wrote:
> I've only seen one other usrp-email about this issue from Alex Gladd. I am
> still trying to recover my microSD card that I did the opkg upgrade on. Now
> it seems that the e1xx-003-make.tar.bz2 dated 11-May-2012 15:34 667M
> expanded on a microSD card will not boot (see attached putty.log). I'm
> running out of things to try, any suggestions?
The boot log says it cannot find the init program on the root file system.
Can you put card in the reader you made it with and find where the files
systems are mounted on the PC. Look at the contents of the card,
particularly the sbin directory and see if the seem "sane".
Philip
>
> Wrm
>
>
> -----Original Message-----
> From: Philip Balister [mailto:[email protected]]
> Sent: Tuesday, April 02, 2013 6:47 PM
> To: Macre, William R
> Cc: Alex Gladd; [email protected]
> Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
>
> On 04/02/2013 06:17 PM, Macre, William R wrote:
>>
>> All:
>>
>> Does anybody know what the status is of this update for the USRP-E1XX???
>
> I ran the update on a card I made from the factory instructions and it booted
> fine for me.
>
> For me to figure out what is happening to existing cards, I am going to need
> more details, such as a log from the serial console up to the failure.
>
> I have had no success finding the failure on my e100s.
>
> Are the people having trouble all using E110's?
>
> Philip
>
>>
>>
>> Wrm
>>
>> -----Original Message-----
>> From: USRP-users [mailto:[email protected]] On Behalf
>> Of Alex Gladd
>> Sent: Friday, March 29, 2013 4:20 PM
>> To: 'Philip Balister'; [email protected]
>> Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
>>
>> We just updated one of our E110s and now it no longer finishes booting.
>>
>> It gets to the point in the boot cycle where it loads the E110 FPGA image
>> and says "-- Configuration complete", then it appears that the system halts.
>> I stop receiving anything over the serial console and the Ethernet port
>> lights on the E110 go out.
>>
>> I think my only option at this point is to pull the power plug, which
>> will likely compound our problems by corrupting my SD card :(
>>
>> Any help would be greatly appreciated.
>>
>> Thanks,
>> ~Alex
>>
>> -------------------------
>> Alex Gladd
>> Staff Engineer
>> Raytheon BBN Technologies
>>
>> -----Original Message-----
>> From: Philip Balister [mailto:[email protected]]
>> Sent: Friday, March 29, 2013 2:38 PM
>> To: [email protected]; GNURadio Discussion List
>> Subject: [USRP-users] E1XX updates for dreaded Ssssssss
>>
>> I have pushed updates into the E1XX package feeds that should resolve
>> the Sssss some people have been seeing. Here is a quick summary of the
>> changes:
>>
>> * UHD 3.5.2 (includes CBX)
>> * Updated kernel (fpga interface timing change, Add support for CIFS
>> and
>> Multicast)
>> * GnuRadio 3.6.4.1
>>
>> You can install these with:
>>
>> # opkg update
>> # opkg upgrade
>>
>> while you are connected to the internet.
>>
>> Philip
>>
>> _______________________________________________
>> USRP-users mailing list
>> [email protected]
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
>>
>> _______________________________________________
>> USRP-users mailing list
>> [email protected]
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
------------------------------
Message: 10
Date: Tue, 2 Apr 2013 19:45:14 -0400
From: "Alex Gladd" <[email protected]>
To: "'Macre, William R'" <[email protected]>, "'Philip Balister'"
<[email protected]>
Cc: [email protected]
Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
Message-ID: <003601ce2ffc$1fa871c0$5ef95540$@com>
Content-Type: text/plain; charset="us-ascii"
We are using an E110 here. I'm hoping to get some time to work on this
tomorrow, provided that a colleague remembers to bring in a
micro-to-standard SD card adapter. We also have another E110 still in the
box, so I can try booting that one up, running the system upgrade, and
seeing if we have the same problem.
Will update with status as soon as I have more info.
~Alex
-----Original Message-----
From: Macre, William R [mailto:[email protected]]
Sent: Tuesday, April 02, 2013 7:04 PM
To: Philip Balister
Cc: Alex Gladd; [email protected]
Subject: RE: [USRP-users] E1XX updates for dreaded Ssssssss
I've only seen one other usrp-email about this issue from Alex Gladd. I am
still trying to recover my microSD card that I did the opkg upgrade on. Now
it seems that the e1xx-003-make.tar.bz2 dated 11-May-2012 15:34 667M
expanded on a microSD card will not boot (see attached putty.log). I'm
running out of things to try, any suggestions?
Wrm
-----Original Message-----
From: Philip Balister [mailto:[email protected]]
Sent: Tuesday, April 02, 2013 6:47 PM
To: Macre, William R
Cc: Alex Gladd; [email protected]
Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
On 04/02/2013 06:17 PM, Macre, William R wrote:
>
> All:
>
> Does anybody know what the status is of this update for the USRP-E1XX???
I ran the update on a card I made from the factory instructions and it
booted fine for me.
For me to figure out what is happening to existing cards, I am going to need
more details, such as a log from the serial console up to the failure.
I have had no success finding the failure on my e100s.
Are the people having trouble all using E110's?
Philip
>
>
> Wrm
>
> -----Original Message-----
> From: USRP-users [mailto:[email protected]] On Behalf
> Of Alex Gladd
> Sent: Friday, March 29, 2013 4:20 PM
> To: 'Philip Balister'; [email protected]
> Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
>
> We just updated one of our E110s and now it no longer finishes booting.
>
> It gets to the point in the boot cycle where it loads the E110 FPGA image
and says "-- Configuration complete", then it appears that the system halts.
> I stop receiving anything over the serial console and the Ethernet port
lights on the E110 go out.
>
> I think my only option at this point is to pull the power plug, which
> will likely compound our problems by corrupting my SD card :(
>
> Any help would be greatly appreciated.
>
> Thanks,
> ~Alex
>
> -------------------------
> Alex Gladd
> Staff Engineer
> Raytheon BBN Technologies
>
> -----Original Message-----
> From: Philip Balister [mailto:[email protected]]
> Sent: Friday, March 29, 2013 2:38 PM
> To: [email protected]; GNURadio Discussion List
> Subject: [USRP-users] E1XX updates for dreaded Ssssssss
>
> I have pushed updates into the E1XX package feeds that should resolve
> the Sssss some people have been seeing. Here is a quick summary of the
> changes:
>
> * UHD 3.5.2 (includes CBX)
> * Updated kernel (fpga interface timing change, Add support for CIFS
> and
> Multicast)
> * GnuRadio 3.6.4.1
>
> You can install these with:
>
> # opkg update
> # opkg upgrade
>
> while you are connected to the internet.
>
> Philip
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
------------------------------
Message: 11
Date: Tue, 02 Apr 2013 19:49:42 -0400
From: Philip Balister <[email protected]>
To: Alex Gladd <[email protected]>
Cc: [email protected]
Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1
On 04/02/2013 07:45 PM, Alex Gladd wrote:
> We are using an E110 here. I'm hoping to get some time to work on this
> tomorrow, provided that a colleague remembers to bring in a
> micro-to-standard SD card adapter. We also have another E110 still in the
> box, so I can try booting that one up, running the system upgrade, and
> seeing if we have the same problem.
>
> Will update with status as soon as I have more info.
>
Thanks. We are also running the update on an e110 at the factory and it
looks like we have duped the issue with uhd_usrp_probe hanging on an
e110. My e100 updated fine. (The difference between the two should be
only the fpga, so I am pretty stumped) Hopefully, it turns into an easy fix.
Philip
> ~Alex
>
>
> -----Original Message-----
> From: Macre, William R [mailto:[email protected]]
> Sent: Tuesday, April 02, 2013 7:04 PM
> To: Philip Balister
> Cc: Alex Gladd; [email protected]
> Subject: RE: [USRP-users] E1XX updates for dreaded Ssssssss
>
> I've only seen one other usrp-email about this issue from Alex Gladd. I am
> still trying to recover my microSD card that I did the opkg upgrade on. Now
> it seems that the e1xx-003-make.tar.bz2 dated 11-May-2012 15:34 667M
> expanded on a microSD card will not boot (see attached putty.log). I'm
> running out of things to try, any suggestions?
>
> Wrm
>
>
> -----Original Message-----
> From: Philip Balister [mailto:[email protected]]
> Sent: Tuesday, April 02, 2013 6:47 PM
> To: Macre, William R
> Cc: Alex Gladd; [email protected]
> Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
>
> On 04/02/2013 06:17 PM, Macre, William R wrote:
>>
>> All:
>>
>> Does anybody know what the status is of this update for the USRP-E1XX???
>
> I ran the update on a card I made from the factory instructions and it
> booted fine for me.
>
> For me to figure out what is happening to existing cards, I am going to need
> more details, such as a log from the serial console up to the failure.
>
> I have had no success finding the failure on my e100s.
>
> Are the people having trouble all using E110's?
>
> Philip
>
>>
>>
>> Wrm
>>
>> -----Original Message-----
>> From: USRP-users [mailto:[email protected]] On Behalf
>> Of Alex Gladd
>> Sent: Friday, March 29, 2013 4:20 PM
>> To: 'Philip Balister'; [email protected]
>> Subject: Re: [USRP-users] E1XX updates for dreaded Ssssssss
>>
>> We just updated one of our E110s and now it no longer finishes booting.
>>
>> It gets to the point in the boot cycle where it loads the E110 FPGA image
> and says "-- Configuration complete", then it appears that the system halts.
>> I stop receiving anything over the serial console and the Ethernet port
> lights on the E110 go out.
>>
>> I think my only option at this point is to pull the power plug, which
>> will likely compound our problems by corrupting my SD card :(
>>
>> Any help would be greatly appreciated.
>>
>> Thanks,
>> ~Alex
>>
>> -------------------------
>> Alex Gladd
>> Staff Engineer
>> Raytheon BBN Technologies
>>
>> -----Original Message-----
>> From: Philip Balister [mailto:[email protected]]
>> Sent: Friday, March 29, 2013 2:38 PM
>> To: [email protected]; GNURadio Discussion List
>> Subject: [USRP-users] E1XX updates for dreaded Ssssssss
>>
>> I have pushed updates into the E1XX package feeds that should resolve
>> the Sssss some people have been seeing. Here is a quick summary of the
>> changes:
>>
>> * UHD 3.5.2 (includes CBX)
>> * Updated kernel (fpga interface timing change, Add support for CIFS
>> and
>> Multicast)
>> * GnuRadio 3.6.4.1
>>
>> You can install these with:
>>
>> # opkg update
>> # opkg upgrade
>>
>> while you are connected to the internet.
>>
>> Philip
>>
>> _______________________________________________
>> USRP-users mailing list
>> [email protected]
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
>>
>> _______________________________________________
>> USRP-users mailing list
>> [email protected]
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
>
------------------------------
Message: 12
Date: Wed, 03 Apr 2013 07:33:46 +0200
From: Florian Schlembach <[email protected]>
To: [email protected]
Cc: [email protected], Marcus
Leech <[email protected]>
Subject: Re: [USRP-users] Purpose of 24-bit CORDIC in DDC chain?
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Thanks, Ian, that already helps a lot.
Marcus and me did already sent some messages to each other.
Unfortunately, they didn't make it through to the list. I always get the
error "Message has implicit destination" and the message waits for
approval of the list administrator. By that, already some of my messages
got lost.
But back to topic: I try to comprehend and describe the functionality of
the ddc chain (for my master thesis). here is what Marcus and me wrote
so far:
Me:
"I see the register phase_inc coming being read from a settings_register
and fed into the CORDIC. Is the fine tuning being controlled by the ZPU
or UHD?"
Marcus:
"UHD does the necessary calculations on the host, and programs the
registers accordingly.
The CIC decimator always runs -- that's what provides decimation, and
then the half-band filters are used, AFAIR, to do some cleanup after the
CIC decimators.
But any of the Ettus engineering team can correct me."
Me:
"One last thing regarding the chosen rate: I am wondering which
decimation filters are activated at a given decimation rate. Matt
already commented on that point on the list.
If the decimation rate is:
- multiples of 4: both of the Halfband filters is active, CIC deactivated
- multiplies of 2: only second (large) Halfband filter is activated, CIC
deactivated"
Now, I had a look into the UHD code
(UHD/host/lib/usrp/usrp2/rx_dsp_core_200.cpp) and found out the
following: If decim_rate is a:
-multiple of 2: HB1 activated, HB2 and CIC deactivated
-multiple of 4: Both HB1 and HB2 activated, CIC deactivated
-any other odd number: decim_rate is decomposed into multiples of 2, the
residual decimation is then performed by the CIC
The CIC is a poor roll-off but is, in turn, freely programmable. HB have
a better roll-off but the decimation rate is fixed to multiples of 2.
Is my understanding right?
------------------------------
Message: 13
Date: Wed, 3 Apr 2013 00:29:08 -0700
From: Ian Buckley <[email protected]>
To: "[email protected] forum" <[email protected]>
Subject: Re: [USRP-users] Purpose of 24-bit CORDIC in DDC chain?
Message-ID: <[email protected]>
Content-Type: text/plain; charset="windows-1252"
Florian, Your understanding at this point is very good: The CIC provides
arbitrary programable decimation at very little FPGA resource usage but has
very significant pass band roll off. The two half bands have fixed decimation
of 2 each but have very linear passband response. Having the Halfbands cascaded
after the CIC allows us to keep the total system passband within the largely
linear portion of the CIC frequency response?thus the reason it is highly
desirable in practical applications using USRPs to have a total system
decimation within the USRP that factors by 4 so that both Halfbands can be
enabled?..further decimation (often with awkward ratio's) that suit the
particular application can then be performed in GNURadio where the now reduced
sample rate makes it computationally feasible. The reason by the way that the
two halfbands are different implementations is that the small halfband can
sustain a throughput of one input sample per clock cycle, where as the large
halfband can only sustain a throughput of one input sample every two clock
cycles because it reuses the physical multipliers with different coefficients
to form more logical taps without doubling the size of the hardware.
In terms of the setting registers configuring the DSP's, yes the ZPU is
responsible for actually writing them, but most of the intelligence behind
calculating the programmed values is indeed implemented in UHD code on the Host.
On Apr 2, 2013, at 10:33 PM, Florian Schlembach
<[email protected]> wrote:
> Thanks, Ian, that already helps a lot.
> Marcus and me did already sent some messages to each other. Unfortunately,
> they didn't make it through to the list. I always get the error "Message has
> implicit destination" and the message waits for approval of the list
> administrator. By that, already some of my messages got lost.
>
> But back to topic: I try to comprehend and describe the functionality of the
> ddc chain (for my master thesis). here is what Marcus and me wrote so far:
> Me:
> "I see the register phase_inc coming being read from a settings_register
> and fed into the CORDIC. Is the fine tuning being controlled by the ZPU
> or UHD?"
>
> Marcus:
> "UHD does the necessary calculations on the host, and programs the registers
> accordingly.
>
> The CIC decimator always runs -- that's what provides decimation, and then
> the half-band filters are used, AFAIR, to do some cleanup after the CIC
> decimators.
>
> But any of the Ettus engineering team can correct me."
>
> Me:
> "One last thing regarding the chosen rate: I am wondering which decimation
> filters are activated at a given decimation rate. Matt already commented on
> that point on the list.
> If the decimation rate is:
> - multiples of 4: both of the Halfband filters is active, CIC deactivated
> - multiplies of 2: only second (large) Halfband filter is activated, CIC
> deactivated"
>
> Now, I had a look into the UHD code
> (UHD/host/lib/usrp/usrp2/rx_dsp_core_200.cpp) and found out the following: If
> decim_rate is a:
> -multiple of 2: HB1 activated, HB2 and CIC deactivated
> -multiple of 4: Both HB1 and HB2 activated, CIC deactivated
> -any other odd number: decim_rate is decomposed into multiples of 2, the
> residual decimation is then performed by the CIC
>
> The CIC is a poor roll-off but is, in turn, freely programmable. HB have a
> better roll-off but the decimation rate is fixed to multiples of 2.
>
> Is my understanding right?
>
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
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Message: 14
Date: Wed, 03 Apr 2013 10:18:12 +0200
From: Florian Schlembach <[email protected]>
To: [email protected]
Cc: [email protected]
Subject: Re: [USRP-users] Timing constraints violations using
custom_dsp_rx module
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Don't know why the last post didn't make through to the list.
Apparently, it was because of the attachements.
I solved the problem by inserting another pipeline stage after the
time_compare module and thereby delaying the strobe_reg by another cycle:
reg action_strobe;
always @(posedge clock) begin
if (reset || clear) strobe_reg <= 0;
else begin
action_reg <= action;
strobe_reg <= action_reg && poke;
end
end
------------------------------
Message: 15
Date: Wed, 03 Apr 2013 10:19:43 +0200
From: Florian Schlembach <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] Custom Block in FPGA code of USRP N210
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
How did you actually try to implement your custom logic? Here are some
instructions how you can do it (I recycled them from some old posts here
on the mailing list):
Have a look at the following README file:
https://github.com/EttusResearch/UHD-Mirror/blob/master/fpga/README.txt
For your purpose, you should proceed as followed:
1. Modify Makefile.N210:
# set me in a custom makefile
CUSTOM_SRCS = $(abspath $(addprefix $(BASE_DIR)/../custom/, \
custom_dsp_rx.v \
))
CUSTOM_DEFS = RX_DSP0_MODULE=custom_dsp_rx
2. Implement your code into /custom/custom_dsp_rx.v
Depending on where you wanna perform fft (before or after the existing
ddc chain, so full bandwidth or decimated) you have to grab the
respective signals. Lets assume now your module should take effect after
ddc, grab your //strobed samples {I16,Q16} from the RX DDC chain
signal ddc_out_sample that comes in with a ddc_out_strobe:
input [31:0] ddc_out_sample,
input ddc_out_strobe, //high on valid sample
output ddc_out_enable, //enables DDC module
and send it further as the bb_sample with a bb_strobe being asserted:
//strobbed baseband samples {I16,Q16} from this module
output [31:0] bb_sample,
output bb_strobe //high on valid sample
3. Validate your custom_dsp_rx.v with a testbench feeding your module
with some stimulus signals
4. Go synthesise it!
5. Burn it onto your device and hope everything works!
------------------------------
Message: 16
Date: Wed, 3 Apr 2013 17:59:07 +0800 (SGT)
From: ZaInzAiN Jj <[email protected]>
To: "[email protected]" <[email protected]>
Subject: [USRP-users] Digital Modulation in GRC
Message-ID:
<[email protected]>
Content-Type: text/plain; charset="us-ascii"
Dear All,
Whether GMSK modulation only that could be implemented in GRC?
and Whether PSK and QAM blocks can be implemented in GRC?
I using ubuntu 12.04, USRP N210 and Gnuradio 3.6.4.1
Best Regards,
Zai
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Message: 17
Date: Wed, 3 Apr 2013 18:22:32 +0800 (SGT)
From: ZaInzAiN Jj <[email protected]>
To: ZaInzAiN Jj <[email protected]>, "[email protected]"
<[email protected]>
Subject: Re: [USRP-users] Digital Modulation in GRC
Message-ID:
<[email protected]>
Content-Type: text/plain; charset="us-ascii"
I use digital modulation for transmit data file with two USRP modules.
________________________________
From: ZaInzAiN Jj <[email protected]>
To: "[email protected]" <[email protected]>
Sent: Wednesday, April 3, 2013 4:59 PM
Subject: [USRP-users] Digital Modulation in GRC
Dear All,
Whether GMSK modulation only that could be implemented in GRC?
and Whether PSK and QAM blocks can be implemented in GRC?
I using ubuntu 12.04, USRP N210 and Gnuradio 3.6.4.1
Best Regards,
Zai
_______________________________________________
USRP-users mailing list
[email protected]
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
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Message: 18
Date: Wed, 03 Apr 2013 13:48:53 +0200
From: Florian Schlembach <[email protected]>
To: [email protected]
Cc: "[email protected] forum"
<[email protected]>
Subject: Re: [USRP-users] Purpose of 24-bit CORDIC in DDC chain?
Message-ID: <[email protected]>
Content-Type: text/plain; charset=windows-1252; format=flowed
On 04/03/2013 09:29 AM, Ian Buckley wrote:
>
> Florian, Your understanding at this point is very good: The CIC provides
> arbitrary programable decimation at very little FPGA resource usage but
> has very significant pass band roll off. The two half bands have fixed
> decimation of 2 each but have very linear passband response. Having the
> Halfbands cascaded after the CIC allows us to keep the total system
> passband within the largely linear portion of the CIC frequency
> response?thus the reason it is highly desirable in practical
> applications using USRPs to have a total system decimation within the
> USRP that factors by 4 so that both Halfbands can be enabled?..
Ian, thanks for your explanations. It's not yet clear to me whether the
CIC is activated for the decim_rate being multiples of four.
Let's assume a decimation rate of 8, then both HB1 and HB2 are
activated, decimating by the input sample rate by a factor of 8. I am
little bit puzzled because I do not see the point how the CIC could
possibly be switched off if the decim_rate is a multiple of 4, according
to the following verilog instantiations
cic_decim #(.bw(WIDTH)) decim_i
(.clock(clk),.reset(rst),.enable(ddc_enb),
.rate(cic_decim_rate),.strobe_in(1'b1),.strobe_out(strobe_cic),
.signal_in(i_cordic_clip),.signal_out(i_cic));
and
// Second (large) halfband 24 bit I/O
wire [8:0] cpi_hb = enable_hb1 ? {cic_decim_rate,1'b0} :
{1'b0,cic_decim_rate};
hb_dec #(.WIDTH(WIDTH)) hb_i
(.clk(clk),.rst(rst),.bypass(~enable_hb2),.run(ddc_enb),.cpi(cpi_hb),
.stb_in(strobe_hb1),.data_in(i_hb1),.stb_out(strobe_hb2),.data_out(i_hb2));
It seems both HB filters are activated by the UHD interface
(enable_hb1/2), how is the actual decimation rate fed to both decim_i
and hb_i if both are fed through a common wire cic_decim_rate?
Is the CIC then actually be activated using decim_rate with multiples of 4?
------------------------------
Message: 19
Date: Wed, 3 Apr 2013 08:35:55 -0400
From: Christopher Roussi <[email protected]>
To: "[email protected]" <[email protected]>
Subject: [USRP-users] E110 upgrade failure
Message-ID: <-769337441695542166@unknownmsgid>
Content-Type: text/plain; charset=ISO-8859-1
I just opened our E110 yesterday, and can confirm that doing the
upgrade is not a good thing. Of course, after reconstructing the SD
card, I did it again, just to make sure...this is time-consuming.
;-{)}
Chris Roussi
Michigan Tech Research Inst.
Sent from...well, you know.
------------------------------
Message: 20
Date: Wed, 03 Apr 2013 08:41:06 -0400
From: Philip Balister <[email protected]>
To: Christopher Roussi <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] E110 upgrade failure
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1
On 04/03/2013 08:35 AM, Christopher Roussi wrote:
> I just opened our E110 yesterday, and can confirm that doing the
> upgrade is not a good thing. Of course, after reconstructing the SD
> card, I did it again, just to make sure...this is time-consuming.
> ;-{)}
We tracked down the problem with the E110 (not E100) last night. We'll
get the ipks updated ASAP.
Philip
>
> Chris Roussi
> Michigan Tech Research Inst.
>
> Sent from...well, you know.
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
------------------------------
Message: 21
Date: Wed, 3 Apr 2013 08:40:24 -0700
From: Johnathan Corgan <[email protected]>
To: Florian Schlembach <[email protected]>
Cc: [email protected],
"[email protected] forum"
<[email protected]>
Subject: Re: [USRP-users] Purpose of 24-bit CORDIC in DDC chain?
Message-ID:
<caloxbzsyrohqdw2owvktgmxpvyashqapxrnzccn22g59s7f...@mail.gmail.com>
Content-Type: text/plain; charset=ISO-8859-1
On Wed, Apr 3, 2013 at 4:48 AM, Florian Schlembach
<[email protected]> wrote:
> It seems both HB filters are activated by the UHD interface (enable_hb1/2),
> how is the actual decimation rate fed to both decim_i and hb_i if both are
> fed through a common wire cic_decim_rate?
>
> Is the CIC then actually be activated using decim_rate with multiples of 4?
See the logic in the UHD host code:
https://github.com/EttusResearch/uhd/blob/master/host/lib/usrp/cores/rx_dsp_core_200.cpp#L170
...to understand how the host code decides how the half-band filters
and CIC filter are configured.
--
Johnathan Corgan
Corgan Labs - SDR Training and Development Services
http://corganlabs.com
------------------------------
Message: 22
Date: Wed, 3 Apr 2013 08:40:24 -0700
From: Johnathan Corgan <[email protected]>
To: Florian Schlembach <[email protected]>
Cc: [email protected],
"[email protected] forum"
<[email protected]>
Subject: Re: [USRP-users] Purpose of 24-bit CORDIC in DDC chain?
Message-ID:
<caloxbzsyrohqdw2owvktgmxpvyashqapxrnzccn22g59s7f...@mail.gmail.com>
Content-Type: text/plain; charset=ISO-8859-1
On Wed, Apr 3, 2013 at 4:48 AM, Florian Schlembach
<[email protected]> wrote:
> It seems both HB filters are activated by the UHD interface (enable_hb1/2),
> how is the actual decimation rate fed to both decim_i and hb_i if both are
> fed through a common wire cic_decim_rate?
>
> Is the CIC then actually be activated using decim_rate with multiples of 4?
See the logic in the UHD host code:
https://github.com/EttusResearch/uhd/blob/master/host/lib/usrp/cores/rx_dsp_core_200.cpp#L170
...to understand how the host code decides how the half-band filters
and CIC filter are configured.
--
Johnathan Corgan
Corgan Labs - SDR Training and Development Services
http://corganlabs.com
------------------------------
Subject: Digest Footer
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------------------------------
End of USRP-users Digest, Vol 32, Issue 2
*****************************************
