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Today's Topics:
1. USRP B210 quadrature imbalance issue. (Simon Pack)
2. Re: User Settings Register Not Working?? (Moritz Fischer)
3. Binary FSK demodulation with symbol timing recovery using
USRP N200 (Adeel Malik)
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Message: 1
Date: Wed, 19 Mar 2014 15:22:10 -0000
From: "Simon Pack" <[email protected]>
To: <[email protected]>
Subject: [USRP-users] USRP B210 quadrature imbalance issue.
Message-ID:
<!&!AAAAAAAAAAAYAAAAAAAAAPw/1cWaKWpJvxMtGFg8nlHCgAAAEAAAAOoEexZh0rVNt6Xcj1IDS3YBAAAAAA==@commagility.com>
Content-Type: text/plain; charset="us-ascii"
Hi,
I am trying to evaluate the AD9361 using an Ettus USRP B210 board.
I am using Ubuntu 13.10 with GNU RADIO 3.7.2.1-213 GRC 3.7.3 and UHD 3.7.0-1
I have a very simple GRC program for generating a 5MHz tone on a 4GHz
carrier, which I then analyse on an external spectrum analyser.
When I first run my play.grc program, I get the following:
3.995GHz @ -40dBm (quadrature imbalance)
4.000GHz @ -52dBm (carrier leakage)
4.005GHz @ -10dBm (expected signal)
However, if I move and return the TX frequency (using the slider), I then
get:
3.995GHz @ -67dBm (quadrature imbalance)
4.000GHz @ -52dBm (carrier leakage)
4.005GHz @ -10dBm (expected signal)
i.e., the quadrature imbalance correction is not being performed by default.
It requires a frequency change trigger it.
Is the startup sequence for the AD9361 correct ?
Is there any way I can trigger the quadrature correction algorithm to occur
at startup ?
Where can I find out more details of how the UHD programs the AD9361 ?
Many thanks,
Simon
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Message: 2
Date: Thu, 20 Mar 2014 09:41:13 +0100
From: Moritz Fischer <[email protected]>
To: Robert Palumbo <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] User Settings Register Not Working??
Message-ID:
<caatxahfder_ppsdkhm5uq91mimot5sr92gife0doejtwoov...@mail.gmail.com>
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Hi Robert,
let me first apologize for the horribly long delay to get back to you.
Now in order to help you, could you outline a bit more what your changes
were to which files? If you could push a branch somewhere on github,
or send me a diff by email, I will hopefully get a better understanding on
what goes wrong.
Cheers,
Moritz
On Fri, Mar 7, 2014 at 6:30 AM, Robert Palumbo <[email protected]> wrote:
> Hey Everyone,
>
> Has anyone been able to use the user settings registers on the N210 (UHD
> v. 3.7.0)? I've recently tried to poke values to the user settings bus
> without success.
>
> As a test, I rebuilt the N210 FPGA code and tied the user address "0" to
> the first LED on the N210, in place of the 'transmitting' signal, via:
>
> wire led_user;
> setting_reg #(.my_addr(0),.width(1)) sr_user_led
>
>
> (.clk(dsp_clk),.rst(dsp_rst),.strobe(set_stb_user),.addr(set_addr_user),.in(set_data_user),.out(led_user),.changed());
>
> wire [7:0] led_src, led_sw;
> wire [7:0] led_hw = {led_user, (run_rx0_d1 | run_rx1_d1), ...
>
> Next, I poked the register via usrp->set_user_register(0,1). I can confirm
> that some information is being transmitted, because the Ethernet light
> blinks. However, the LED does not light, which seems to indicate that the
> address is not being poked correctly.
>
> I confirmed that Xilinx isn't optimizing away the user settings registers
> for some strange reason.
>
> Am I using the user settings register correctly?
>
> Rob
>
> --
> Robert A Palumbo
> [email protected]
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
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Message: 3
Date: Thu, 20 Mar 2014 14:09:07 +0500
From: Adeel Malik <[email protected]>
To: [email protected], [email protected]
Subject: [USRP-users] Binary FSK demodulation with symbol timing
recovery using USRP N200
Message-ID:
<caewq9pfn96wdwubjjreme5r2ekcqj7q-egtfolcmwnjzblv...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
Hi Martin,
Thanks for your reply. To put in a brief, I need a simulink
model to implement non-coherent binary FSK demodulation along with
symbol/timing recovery using USRP N200 Card and SBX daughterboard. There
are already simulink based examples for QPSK receiver but I need to modify
them for FSK. If you could suggest how to modify the 'QPSK Reciever'
Simulink model to implement binary FSK I'll be grateful as I couldn't find
any examples related to that.
Pls suggest if you require more information,
Regards,
Adeel
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