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Today's Topics:
1. Re: Bandwidth limitation ([email protected])
2. Re: B210 UHD Error (Martin Braun)
3. Re: Bandwidth limitation ([email protected])
4. Re: USRP-users Digest, Vol 49, Issue 25 (Matt Ettus)
5. Re: B210 rev6 - currently shipping? (Ben Hilburn)
6. Re: B210 rev6 - currently shipping? (Paul David Sutton)
7. Re: USRP-users Digest, Vol 49, Issue 25 (Isen I-Chun Chao)
8. Error msg of `GLIBCXX_3.4.xx' not found for uhd_usrp_probe
after doing Xilinx ISE environment setting (Isen I-Chun Chao)
9. Re: Error msg of `GLIBCXX_3.4.xx' not found for
uhd_usrp_probe after doing Xilinx ISE environment setting
(Ian Buckley)
10. Re: Error msg of `GLIBCXX_3.4.xx' not found for
uhd_usrp_probe after doing Xilinx ISE environment setting
(Isen I-Chun Chao)
11. Loading USRP X3x0 by baseband processing functions
(Birhane Alemayoh)
12. Success report: B200/USB 3.0 card/Core i7-2600 (Robert McIntyre)
13. Re: Success report: B200/USB 3.0 card/Core i7-2600 (Martin Braun)
14. Re: Success report: B200/USB 3.0 card/Core i7-2600
(Robert McIntyre)
15. Frequency translation works differently on N210 and B210.
(Urban Hakansson)
16. Re: Frequency translation works differently on N210 and B210.
(Marcus D. Leech)
17. Re: Success report: B200/USB 3.0 card/Core i7-2600
(Robert McIntyre)
18. Remov MIMO-cable (Per Zetterberg)
19. How to sync to external ref. AND use the MIMO cable
(Thomas Hobiger)
20. rx_sample_to_file not working with --args = (john okai)
21. rx_samples_to_file issue (gsmandvoip)
22. Talking to USRP using UHD in Windows 7 (Karthik Reddy)
----------------------------------------------------------------------
Message: 1
Date: Tue, 30 Sep 2014 12:03:47 -0400
From: [email protected]
To: "FIXED-TERM Ghobrial Antoun (CR/AEH4)"
<[email protected]>
Cc: [email protected]
Subject: Re: [USRP-users] Bandwidth limitation
Message-ID: <[email protected]>
Content-Type: text/plain; charset="utf-8"
The per-direction bandwidth limit over 1GiGe is 25Msps, assuming 16-bit
samples. If you use sc8
samples, that goes up to 50Msps. That's an aggregate number. If you're
streaming from both antenna connectors, divide-by-2.
But that's just the physical limit of the 1GiGe interface. How much you
*can actually process* is more a function of your host
computer than the "bus" interface.
On 2014-09-30 11:49, FIXED-TERM Ghobrial Antoun (CR/AEH4) via USRP-users
wrote:
> Hello ,
>
> I am using USRP N210 with LFTX and LFRX daughter boards connected with the
> host computer via an Ethernet connection.
> According to this tutorial provided by Ettus ,
> http://www.ettus.com/kb/detail/usrp-bandwidth [2]
>
> I can say that bandwidth is around 20 MHz and this limit is set by the
> Ethernet connection.
>
> Here , I have a question :
> For each LFTX and LFRX , there are two antenna (or two channel A & B).
> If I am using only one channel (A or B) from each daughterboard (One Tx
> channel and one Rx channel ), Does it mean that bandwidth will remain the
> same to be equal = 20 MHz or 20MHz/(No of channels) ?!
>
> According to that, every channel should have a bandwidth below a certain
> value. How can I calculate this threshold value ?!
>
> I have the same question if I am going to use both antennas from both
> daughter boards ?!
> Any Suggestion !!
>
> Mit freundlichen Gr??en / Best regards
>
> ANTOUN GHOBRIAL
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com [1]
Links:
------
[1] http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[2] http://www.ettus.com/kb/detail/usrp-bandwidth
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Message: 2
Date: Tue, 30 Sep 2014 09:10:54 -0700
From: Martin Braun <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] B210 UHD Error
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Terry,
thanks, this is useful information. We are currently working on this
bug, but unfortunately, it only occurs with some B-Series boards, and
any bug that occurs once every couple of hours is hard to debug.
Could you please help us by providing additional info:
- Is this behaviour rate-dependent? Does it happen more easily at high
rates?
- You are connected to USB 3, I presume?
- Which rev board do you have?
- Just to be sure: You have a B210, and not a B200, right?
Thanks for your help with this -- any datapoint we get will accelerate
any solution we can come up with.
Cheers,
m
On 30.09.2014 07:39, Terry Stevenson via USRP-users wrote:
> Hi,
>
> I'm using a USRP B210 and I've encountered what seems to be a driver
> error. When running the uhd_fft program (packaged with GnuRadio) it will
> run smoothly for a few minutes, then become very laggy, then freeze and
> begin printing "UHD Error: The receive packet handler caught an
> exception. RuntimeError: usb rx6 transfer status 5".
>
> At first I was using UHD 3.7.2, and I saw that another user had a
> similar problem, so I reverted to 3.7.1. Now it will run for several
> hours, but the same problem eventually occurs. My motherboard chipset is
> Intel Z77 Express, if that helps.
>
> Thanks,
> Terry
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
------------------------------
Message: 3
Date: Tue, 30 Sep 2014 12:21:50 -0400
From: [email protected]
To: "FIXED-TERM Ghobrial Antoun (CR/AEH4)"
<[email protected]>
Cc: [email protected]
Subject: Re: [USRP-users] Bandwidth limitation
Message-ID: <[email protected]>
Content-Type: text/plain; charset="utf-8"
You just specify a "sc8" write-format when creating the stream args in
UHD.
The TX and RX sides are independent. 1GiGe is full-duplex.
On 2014-09-30 12:18, FIXED-TERM Ghobrial Antoun (CR/AEH4) wrote:
> Hello ,
>
> Kindly help me to understand your response.
>
> I have here some questions
>
> - Is it possible to use 8 Bit samples instead of 16 , if possible , then how
> ?
>
> - Let us say that I am using one channel for Tx (one antenna from LFTX )and
> another for Rx (one antenna from LFRX ) , then the max sampling rate will be
> 25e6/2 ? .. Did I get you correctly ?
>
> Thanking you in advance .
>
> Mit freundlichen Gr??en / Best regards
>
> Antoun Ghobrial
>
> FROM: [email protected] [mailto:[email protected]]
> SENT: Dienstag, 30. September 2014 18:04
> TO: FIXED-TERM Ghobrial Antoun (CR/AEH4)
> CC: [email protected]
> SUBJECT: Re: [USRP-users] Bandwidth limitation
>
> The per-direction bandwidth limit over 1GiGe is 25Msps, assuming 16-bit
> samples. If you use sc8
> samples, that goes up to 50Msps. That's an aggregate number. If you're
> streaming from both antenna connectors, divide-by-2.
>
> But that's just the physical limit of the 1GiGe interface. How much you *can
> actually process* is more a function of your host
>
> computer than the "bus" interface.
>
> On 2014-09-30 11:49, FIXED-TERM Ghobrial Antoun (CR/AEH4) via USRP-users
> wrote:
>
>> Hello ,
>>
>> I am using USRP N210 with LFTX and LFRX daughter boards connected with the
>> host computer via an Ethernet connection.
>>
>> According to this tutorial provided by Ettus ,
>>
>> http://www.ettus.com/kb/detail/usrp-bandwidth [2]
>>
>> I can say that bandwidth is around 20 MHz and this limit is set by the
>> Ethernet connection.
>>
>> Here , I have a question :
>>
>> For each LFTX and LFRX , there are two antenna (or two channel A & B).
>>
>> If I am using only one channel (A or B) from each daughterboard (One Tx
>> channel and one Rx channel ), Does it mean that bandwidth will remain the
>> same to be equal = 20 MHz or 20MHz/(No of channels) ?!
>>
>> According to that, every channel should have a bandwidth below a certain
>> value. How can I calculate this threshold value ?!
>>
>> I have the same question if I am going to use both antennas from both
>> daughter boards ?!
>>
>> Any Suggestion !!
>>
>> Mit freundlichen Gr??en / Best regards
>>
>> ANTOUN GHOBRIAL
>>
>> _______________________________________________
>>
>> USRP-users mailing list
>>
>> [email protected]
>>
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com [1]
Links:
------
[1] http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[2] http://www.ettus.com/kb/detail/usrp-bandwidth
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Message: 4
Date: Tue, 30 Sep 2014 09:39:50 -0700
From: Matt Ettus <[email protected]>
To: "Marcus D. Leech" <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] USRP-users Digest, Vol 49, Issue 25
Message-ID:
<CAN=1kn_8r_sb7kjhb7OY0y-wo1C2irS5hWjiR==rwYHaW7ku=g...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
We hope to put things out within a month or so.
Matt
On Tue, Sep 30, 2014 at 8:47 AM, Marcus D. Leech via USRP-users <
[email protected]> wrote:
> I'm sure Matt would have better "crystal balling", but my personal
> impression is that RFNoC is still several months away from being a
>
> thing one might want to share with the greater community.
>
>
>
>
>
>
>
>
> On 2014-09-30 11:39, Isen I-Chun Chao via USRP-users wrote:
>
> Hi
> Since Martin mentioned the biggest changes in FPGA code, which making it
> easier to build, I wonder if this release is the version with
> Network-on-Chip design tool, which I am currently waiting for. If so, I
> actually did not see any major change in usrp3/top/x300 in the fpga
> directory.
>
> Thanks
>
>
>
> *Best Regards,Isen I-Chun Chao*
>
>
>
>>
>> Message: 7
>> Date: Thu, 25 Sep 2014 12:07:52 -0700
>> From: Martin Braun <[email protected]>
>> To: "'[email protected]'" <[email protected]>
>> Subject: [USRP-users] [UHD-3.7.3-RC1] Bugfix Release Announcement
>> Message-ID: <[email protected]>
>> Content-Type: text/plain; charset=ISO-8859-1; format=flowed
>>
>> Hi everyone,
>>
>> we'll soon be releasing another bugfix release (3.7.3) and are putting
>> out a release candidate for now. It is tagged at
>> https://github.com/EttusResearch/uhddev/tree/003_007_003_rc1.
>>
>> Users working off of the 'maint' branch will be automatically updated if
>> you run a 'git pull'.
>> Note: This RC includes new images, so do run uhd_images_downloader if
>> you update. There is no warning or error if you don't update the images
>> (because they are still compatible), but you won't benefit from the
>> stability changes we introduced.
>>
>> This RC mainly includes stability issues and bugfixes. The biggest
>> change is for the FPGA code, which is now easier to build.
>>
>> Enjoy!
>>
>> Martin
>>
>> 3.7.3-RC1 Changelog:
>> * Fixed examples
>> * Removed compiler warnings
>> * Fixed CBX LO settings (FRAC truncation)
>> * Fixed build issues for out-of-tree tools for some distros
>> * Fixed some logging strings (SBX, GPSDO)
>> * Improved logging (speedups, removed unnecessary cycles)
>> * Added output sync for DAC reference clocks on X300
>>
>>
>> ------------------------------
>>
>> > -----Original Message-----
>> > From: USRP-users [mailto:[email protected]] On Behalf
>> Of Martin Braun via USRP-users
>> > Sent: Thursday, 25 September, 2014 21:08
>> > To: '[email protected]'
>> > Subject: [USRP-users] [UHD-3.7.3-RC1] Bugfix Release Announcement
>> >
>> > Hi everyone,
>> >
>> > we'll soon be releasing another bugfix release (3.7.3) and are putting
>> out a release candidate for now. It is tagged at
>> > https://github.com/EttusResearch/uhddev/tree/003_007_003_rc1.
>> >
>> > Users working off of the 'maint' branch will be automatically updated
>> if you run a 'git pull'.
>> > Note: This RC includes new images, so do run uhd_images_downloader if
>> you update. There is no warning or error if you don't
>> > update the images (because they are still compatible), but you won't
>> benefit from the stability changes we introduced.
>> >
>> > This RC mainly includes stability issues and bugfixes. The biggest
>> change is for the FPGA code, which is now easier to build.
>> >
>> > Enjoy!
>> >
>> > Martin
>> >
>> > 3.7.3-RC1 Changelog:
>> > * Fixed examples
>> > * Removed compiler warnings
>> > * Fixed CBX LO settings (FRAC truncation)
>> > * Fixed build issues for out-of-tree tools for some distros
>> > * Fixed some logging strings (SBX, GPSDO)
>> > * Improved logging (speedups, removed unnecessary cycles)
>> > * Added output sync for DAC reference clocks on X300
>> >
>> > _______________________________________________
>> > USRP-users mailing list
>> > [email protected]
>> > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
>> -------------- next part --------------
>> A non-text attachment was scrubbed...
>> Name: PGP.sig
>> Type: application/pgp-signature
>> Size: 832 bytes
>> Desc: not available
>> URL: <
>> http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/attachments/20140925/05b99892/attachment-0001.sig
>> >
>>
>> ------------------------------
>>
>> Message: 9
>> Date: Thu, 25 Sep 2014 12:42:32 -0700
>> From: Martin Braun <[email protected]>
>> To: "'[email protected]'" <[email protected]>
>> Subject: Re: [USRP-users] [UHD-3.7.3-RC1] Bugfix Release Announcement
>> Message-ID: <[email protected]>
>> Content-Type: text/plain; charset=ISO-8859-1; format=flowed
>>
>> My apologies, the tag is actually to be found here:
>> https://github.com/EttusResearch/uhd/tree/003_007_003_rc1
>>
>> Cheers,
>> Martin
>>
>>
>> On 25.09.2014 12:07, Martin Braun wrote:
>> > Hi everyone,
>> >
>> > we'll soon be releasing another bugfix release (3.7.3) and are putting
>> > out a release candidate for now. It is tagged at
>> > https://github.com/EttusResearch/uhddev/tree/003_007_003_rc1.
>> >
>> > Users working off of the 'maint' branch will be automatically updated if
>> > you run a 'git pull'.
>> > Note: This RC includes new images, so do run uhd_images_downloader if
>> > you update. There is no warning or error if you don't update the images
>> > (because they are still compatible), but you won't benefit from the
>> > stability changes we introduced.
>> >
>> > This RC mainly includes stability issues and bugfixes. The biggest
>> > change is for the FPGA code, which is now easier to build.
>> >
>> > Enjoy!
>> >
>> > Martin
>> >
>> > 3.7.3-RC1 Changelog:
>> > * Fixed examples
>> > * Removed compiler warnings
>> > * Fixed CBX LO settings (FRAC truncation)
>> > * Fixed build issues for out-of-tree tools for some distros
>> > * Fixed some logging strings (SBX, GPSDO)
>> > * Improved logging (speedups, removed unnecessary cycles)
>> > * Added output sync for DAC reference clocks on X300
>>
>> ------------------------------
>>
>> Message: 10
>> Date: Thu, 25 Sep 2014 12:44:41 -0700
>> From: Martin Braun <[email protected]>
>> Cc: [email protected]
>> Subject: Re: [USRP-users] [UHD-3.7.3-RC1] Bugfix Release Announcement
>> Message-ID: <[email protected]>
>> Content-Type: text/plain; charset=ISO-8859-1; format=flowed
>>
>> On 25.09.2014 12:32, Ralph A. Schmid, dk5ras wrote:
>> > Hi,
>> >
>> > Will this also deal with the b210 issue discussed during the last days?
>>
>> If you're talking about the disconnect issues: As far as we know, they
>> only occur on the master branch, so the maint branch should be
>> unaffected. However, we're also working on that issue at the moment.
>>
>> > Thank you for all the continuous work on the code!
>>
>> You're very welcome! Expect more improvements in the future!
>>
>> Cheers,
>> Martin
>>
>> >
>> > Ralph.
>> >
>> >> -----Original Message-----
>> >> From: USRP-users [mailto:[email protected]] On
>> Behalf Of Martin Braun via USRP-users
>> >> Sent: Thursday, 25 September, 2014 21:08
>> >> To: '[email protected]'
>> >> Subject: [USRP-users] [UHD-3.7.3-RC1] Bugfix Release Announcement
>> >>
>> >> Hi everyone,
>> >>
>> >> we'll soon be releasing another bugfix release (3.7.3) and are putting
>> out a release candidate for now. It is tagged at
>> >> https://github.com/EttusResearch/uhddev/tree/003_007_003_rc1.
>> >>
>> >> Users working off of the 'maint' branch will be automatically updated
>> if you run a 'git pull'.
>> >> Note: This RC includes new images, so do run uhd_images_downloader if
>> you update. There is no warning or error if you don't
>> >> update the images (because they are still compatible), but you won't
>> benefit from the stability changes we introduced.
>> >>
>> >> This RC mainly includes stability issues and bugfixes. The biggest
>> change is for the FPGA code, which is now easier to build.
>> >>
>> >> Enjoy!
>> >>
>> >> Martin
>> >>
>> >> 3.7.3-RC1 Changelog:
>> >> * Fixed examples
>> >> * Removed compiler warnings
>> >> * Fixed CBX LO settings (FRAC truncation)
>> >> * Fixed build issues for out-of-tree tools for some distros
>> >> * Fixed some logging strings (SBX, GPSDO)
>> >> * Improved logging (speedups, removed unnecessary cycles)
>> >> * Added output sync for DAC reference clocks on X300
>> >>
>> >> _______________________________________________
>> >> USRP-users mailing list
>> >> [email protected]
>> >> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>> >
>>
>>
> _______________________________________________
> USRP-users mailing
> [email protected]http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
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Message: 5
Date: Tue, 30 Sep 2014 10:17:38 -0700
From: Ben Hilburn <[email protected]>
To: Paul Sutton <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] B210 rev6 - currently shipping?
Message-ID:
<caoevzk+hmp2u0vou5q-4etdp5-qhqqjhwrejfx6nk6tfrnw...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Hi Paul -
Yes, I believe you will. If you ask our sales team when you order, they
should be able to confirm it for you.
Cheers,
Ben
On Tue, Sep 30, 2014 at 3:29 AM, Paul Sutton via USRP-users <
[email protected]> wrote:
> Hi,
> If I order a B210 today, will I get the newer rev6 model?
>
> Thanks,
> Paul
>
> --
> ________________________________________________________________
> Paul Sutton Ph.D.
>
> CTVR, The Telecommunications Research Centre,
> Room 2.08, Dunlop House, Fenian Street,
> University of Dublin, Trinity College, Ireland.
>
> +353-1-8968443 | [email protected] | http://www.ctvr.ie
>
> PGP Key ID: 7762DDC6
> Fingerprint: 3EB5 39A3 C33D 68DE FA0F 1B81 C422 DC6C 7762 DDC6
> ________________________________________________________________
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
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Message: 6
Date: Tue, 30 Sep 2014 19:25:01 +0200
From: Paul David Sutton <[email protected]>
To: Ben Hilburn <[email protected]>
Cc: [email protected]
Subject: Re: [USRP-users] B210 rev6 - currently shipping?
Message-ID:
<caeymh5fdtrhf_mf-lypbt5kefqjto+uuawbqgugnyz8jhxq...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Thanks Ben.
On 30 Sep 2014 18:18, "Ben Hilburn" <[email protected]> wrote:
> Hi Paul -
>
> Yes, I believe you will. If you ask our sales team when you order, they
> should be able to confirm it for you.
>
> Cheers,
> Ben
>
> On Tue, Sep 30, 2014 at 3:29 AM, Paul Sutton via USRP-users <
> [email protected]> wrote:
>
>> Hi,
>> If I order a B210 today, will I get the newer rev6 model?
>>
>> Thanks,
>> Paul
>>
>> --
>> ________________________________________________________________
>> Paul Sutton Ph.D.
>>
>> CTVR, The Telecommunications Research Centre,
>> Room 2.08, Dunlop House, Fenian Street,
>> University of Dublin, Trinity College, Ireland.
>>
>> +353-1-8968443 | [email protected] | http://www.ctvr.ie
>>
>> PGP Key ID: 7762DDC6
>> Fingerprint: 3EB5 39A3 C33D 68DE FA0F 1B81 C422 DC6C 7762 DDC6
>> ________________________________________________________________
>>
>>
>> _______________________________________________
>> USRP-users mailing list
>> [email protected]
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
>
>
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Message: 7
Date: Tue, 30 Sep 2014 13:26:18 -0400
From: Isen I-Chun Chao <[email protected]>
To: Matt Ettus <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] USRP-users Digest, Vol 49, Issue 25
Message-ID:
<caeg73korm68t0chbkrbvwk4mb5ul9mw60unsowdobwk1jqj...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Got it. Thanks for the info.
*Best Regards,Isen I-Chun Chao*
On Tue, Sep 30, 2014 at 12:39 PM, Matt Ettus <[email protected]> wrote:
>
> We hope to put things out within a month or so.
>
> Matt
>
> On Tue, Sep 30, 2014 at 8:47 AM, Marcus D. Leech via USRP-users <
> [email protected]> wrote:
>
>> I'm sure Matt would have better "crystal balling", but my personal
>> impression is that RFNoC is still several months away from being a
>>
>> thing one might want to share with the greater community.
>>
>>
>>
>>
>>
>>
>>
>>
>> On 2014-09-30 11:39, Isen I-Chun Chao via USRP-users wrote:
>>
>> Hi
>> Since Martin mentioned the biggest changes in FPGA code, which making it
>> easier to build, I wonder if this release is the version with
>> Network-on-Chip design tool, which I am currently waiting for. If so, I
>> actually did not see any major change in usrp3/top/x300 in the fpga
>> directory.
>>
>> Thanks
>>
>>
>>
>> *Best Regards,Isen I-Chun Chao*
>>
>>
>>
>>>
>>> Message: 7
>>> Date: Thu, 25 Sep 2014 12:07:52 -0700
>>> From: Martin Braun <[email protected]>
>>> To: "'[email protected]'" <[email protected]>
>>> Subject: [USRP-users] [UHD-3.7.3-RC1] Bugfix Release Announcement
>>> Message-ID: <[email protected]>
>>> Content-Type: text/plain; charset=ISO-8859-1; format=flowed
>>>
>>> Hi everyone,
>>>
>>> we'll soon be releasing another bugfix release (3.7.3) and are putting
>>> out a release candidate for now. It is tagged at
>>> https://github.com/EttusResearch/uhddev/tree/003_007_003_rc1.
>>>
>>> Users working off of the 'maint' branch will be automatically updated if
>>> you run a 'git pull'.
>>> Note: This RC includes new images, so do run uhd_images_downloader if
>>> you update. There is no warning or error if you don't update the images
>>> (because they are still compatible), but you won't benefit from the
>>> stability changes we introduced.
>>>
>>> This RC mainly includes stability issues and bugfixes. The biggest
>>> change is for the FPGA code, which is now easier to build.
>>>
>>> Enjoy!
>>>
>>> Martin
>>>
>>> 3.7.3-RC1 Changelog:
>>> * Fixed examples
>>> * Removed compiler warnings
>>> * Fixed CBX LO settings (FRAC truncation)
>>> * Fixed build issues for out-of-tree tools for some distros
>>> * Fixed some logging strings (SBX, GPSDO)
>>> * Improved logging (speedups, removed unnecessary cycles)
>>> * Added output sync for DAC reference clocks on X300
>>>
>>>
>>> ------------------------------
>>>
>>> > -----Original Message-----
>>> > From: USRP-users [mailto:[email protected]] On
>>> Behalf Of Martin Braun via USRP-users
>>> > Sent: Thursday, 25 September, 2014 21:08
>>> > To: '[email protected]'
>>> > Subject: [USRP-users] [UHD-3.7.3-RC1] Bugfix Release Announcement
>>> >
>>> > Hi everyone,
>>> >
>>> > we'll soon be releasing another bugfix release (3.7.3) and are putting
>>> out a release candidate for now. It is tagged at
>>> > https://github.com/EttusResearch/uhddev/tree/003_007_003_rc1.
>>> >
>>> > Users working off of the 'maint' branch will be automatically updated
>>> if you run a 'git pull'.
>>> > Note: This RC includes new images, so do run uhd_images_downloader if
>>> you update. There is no warning or error if you don't
>>> > update the images (because they are still compatible), but you won't
>>> benefit from the stability changes we introduced.
>>> >
>>> > This RC mainly includes stability issues and bugfixes. The biggest
>>> change is for the FPGA code, which is now easier to build.
>>> >
>>> > Enjoy!
>>> >
>>> > Martin
>>> >
>>> > 3.7.3-RC1 Changelog:
>>> > * Fixed examples
>>> > * Removed compiler warnings
>>> > * Fixed CBX LO settings (FRAC truncation)
>>> > * Fixed build issues for out-of-tree tools for some distros
>>> > * Fixed some logging strings (SBX, GPSDO)
>>> > * Improved logging (speedups, removed unnecessary cycles)
>>> > * Added output sync for DAC reference clocks on X300
>>> >
>>> > _______________________________________________
>>> > USRP-users mailing list
>>> > [email protected]
>>> > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>>
>>> -------------- next part --------------
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>>> Type: application/pgp-signature
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>>> http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/attachments/20140925/05b99892/attachment-0001.sig
>>> >
>>>
>>> ------------------------------
>>>
>>> Message: 9
>>> Date: Thu, 25 Sep 2014 12:42:32 -0700
>>> From: Martin Braun <[email protected]>
>>> To: "'[email protected]'" <[email protected]>
>>> Subject: Re: [USRP-users] [UHD-3.7.3-RC1] Bugfix Release Announcement
>>> Message-ID: <[email protected]>
>>> Content-Type: text/plain; charset=ISO-8859-1; format=flowed
>>>
>>> My apologies, the tag is actually to be found here:
>>> https://github.com/EttusResearch/uhd/tree/003_007_003_rc1
>>>
>>> Cheers,
>>> Martin
>>>
>>>
>>> On 25.09.2014 12:07, Martin Braun wrote:
>>> > Hi everyone,
>>> >
>>> > we'll soon be releasing another bugfix release (3.7.3) and are putting
>>> > out a release candidate for now. It is tagged at
>>> > https://github.com/EttusResearch/uhddev/tree/003_007_003_rc1.
>>> >
>>> > Users working off of the 'maint' branch will be automatically updated
>>> if
>>> > you run a 'git pull'.
>>> > Note: This RC includes new images, so do run uhd_images_downloader if
>>> > you update. There is no warning or error if you don't update the images
>>> > (because they are still compatible), but you won't benefit from the
>>> > stability changes we introduced.
>>> >
>>> > This RC mainly includes stability issues and bugfixes. The biggest
>>> > change is for the FPGA code, which is now easier to build.
>>> >
>>> > Enjoy!
>>> >
>>> > Martin
>>> >
>>> > 3.7.3-RC1 Changelog:
>>> > * Fixed examples
>>> > * Removed compiler warnings
>>> > * Fixed CBX LO settings (FRAC truncation)
>>> > * Fixed build issues for out-of-tree tools for some distros
>>> > * Fixed some logging strings (SBX, GPSDO)
>>> > * Improved logging (speedups, removed unnecessary cycles)
>>> > * Added output sync for DAC reference clocks on X300
>>>
>>> ------------------------------
>>>
>>> Message: 10
>>> Date: Thu, 25 Sep 2014 12:44:41 -0700
>>> From: Martin Braun <[email protected]>
>>> Cc: [email protected]
>>> Subject: Re: [USRP-users] [UHD-3.7.3-RC1] Bugfix Release Announcement
>>> Message-ID: <[email protected]>
>>> Content-Type: text/plain; charset=ISO-8859-1; format=flowed
>>>
>>> On 25.09.2014 12:32, Ralph A. Schmid, dk5ras wrote:
>>> > Hi,
>>> >
>>> > Will this also deal with the b210 issue discussed during the last days?
>>>
>>> If you're talking about the disconnect issues: As far as we know, they
>>> only occur on the master branch, so the maint branch should be
>>> unaffected. However, we're also working on that issue at the moment.
>>>
>>> > Thank you for all the continuous work on the code!
>>>
>>> You're very welcome! Expect more improvements in the future!
>>>
>>> Cheers,
>>> Martin
>>>
>>> >
>>> > Ralph.
>>> >
>>> >> -----Original Message-----
>>> >> From: USRP-users [mailto:[email protected]] On
>>> Behalf Of Martin Braun via USRP-users
>>> >> Sent: Thursday, 25 September, 2014 21:08
>>> >> To: '[email protected]'
>>> >> Subject: [USRP-users] [UHD-3.7.3-RC1] Bugfix Release Announcement
>>> >>
>>> >> Hi everyone,
>>> >>
>>> >> we'll soon be releasing another bugfix release (3.7.3) and are
>>> putting out a release candidate for now. It is tagged at
>>> >> https://github.com/EttusResearch/uhddev/tree/003_007_003_rc1.
>>> >>
>>> >> Users working off of the 'maint' branch will be automatically updated
>>> if you run a 'git pull'.
>>> >> Note: This RC includes new images, so do run uhd_images_downloader if
>>> you update. There is no warning or error if you don't
>>> >> update the images (because they are still compatible), but you won't
>>> benefit from the stability changes we introduced.
>>> >>
>>> >> This RC mainly includes stability issues and bugfixes. The biggest
>>> change is for the FPGA code, which is now easier to build.
>>> >>
>>> >> Enjoy!
>>> >>
>>> >> Martin
>>> >>
>>> >> 3.7.3-RC1 Changelog:
>>> >> * Fixed examples
>>> >> * Removed compiler warnings
>>> >> * Fixed CBX LO settings (FRAC truncation)
>>> >> * Fixed build issues for out-of-tree tools for some distros
>>> >> * Fixed some logging strings (SBX, GPSDO)
>>> >> * Improved logging (speedups, removed unnecessary cycles)
>>> >> * Added output sync for DAC reference clocks on X300
>>> >>
>>> >> _______________________________________________
>>> >> USRP-users mailing list
>>> >> [email protected]
>>> >> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>> >
>>>
>>>
>> _______________________________________________
>> USRP-users mailing
>> [email protected]http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
>>
>> _______________________________________________
>> USRP-users mailing list
>> [email protected]
>> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>>
>>
>
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------------------------------
Message: 8
Date: Tue, 30 Sep 2014 14:19:55 -0400
From: Isen I-Chun Chao <[email protected]>
To: "[email protected]" <[email protected]>
Subject: [USRP-users] Error msg of `GLIBCXX_3.4.xx' not found for
uhd_usrp_probe after doing Xilinx ISE environment setting
Message-ID:
<caeg73koybjgfq-cykim_5vclc66+g_debq0vx5bo3qz91mo...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Hi,
I am building the FPGA image for X3x0 and met a problem about running '
*uhd_usrp_probe*' (or '*uhd_find_device*') after '*source settings64.sh*'
I use Ubuntu 14.04 on a x86_64 machine and with uhd-3.7.3rc1.
Since I am building the FPGA image with Xilinx ISE 14.6, I first set the
environment variable for Xilinx ISE, by running '*source
/opt/Xilinx/14.6/ISE_DS/settings64.sh*' and then I am able to get a FPGA
image by running '*make X310_HGS*' in '*<uhd_dir>/fpga/usrp3/top/x300*'.
However, once I did '*source /opt/Xilinx/14.6/ISE_DS/settings64.sh*', I got
errors from running '*uhd_usrp_probe*' or '*uhd_find_device*' with the
following error messages.
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.11' not found (required by /opt/uhd/bin/uhd_usrp_probe)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.9' not found (required by /opt/uhd/bin/uhd_usrp_probe)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.15' not found (required by /opt/uhd/bin/uhd_usrp_probe)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.11' not found (required by /opt/uhd/lib/libuhd.so.003)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.9' not found (required by /opt/uhd/lib/libuhd.so.003)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.15' not found (required by /opt/uhd/lib/libuhd.so.003)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.9' not found (required by
/usr/lib/x86_64-linux-gnu/libboost_program_options.so.1.54.0)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.11' not found (required by
/usr/lib/x86_64-linux-gnu/libboost_program_options.so.1.54.0)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.15' not found (required by
/usr/lib/x86_64-linux-gnu/libboost_date_time.so.1.54.0)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.11' not found (required by
/usr/lib/x86_64-linux-gnu/libboost_regex.so.1.54.0)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.9' not found (required by
/usr/lib/x86_64-linux-gnu/libboost_regex.so.1.54.0)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.15' not found (required by
/usr/lib/x86_64-linux-gnu/libboost_regex.so.1.54.0)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.9' not found (required by
/usr/lib/x86_64-linux-gnu/libboost_thread.so.1.54.0)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.15' not found (required by
/usr/lib/x86_64-linux-gnu/libboost_serialization.so.1.54.0)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.11' not found (required by
/usr/lib/x86_64-linux-gnu/libboost_serialization.so.1.54.0)
/opt/uhd/bin/uhd_usrp_probe:
/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
`GLIBCXX_3.4.9' not found (required by
/usr/lib/x86_64-linux-gnu/libboost_serialization.so.1.54.0)
I thought this should be the environment variable problem. So I checked
them and there are only few env vars are changed and created as shown below:
Before '*source /opt/Xilinx/14.6/ISE_DS/settings64.sh*':
- LD_LIBRARY_PATH=/opt/uhd/lib:/opt/gnuradio/lib
-
PATH=/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games
After '*source /opt/Xilinx/14.6/ISE_DS/settings64.sh*':
-LD_LIBRARY_PATH=/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64:/opt/Xilinx/14.6/ISE_DS/ISE/smartmodel/lin64/installed_lin64/lib:/opt/Xilinx/14.6/ISE_DS/ISE/sysgen/lib:/opt/Xilinx/14.6/ISE_DS/EDK/lib/lin64:/opt/Xilinx/14.6/ISE_DS/common/lib/lin64:/opt/uhd/lib:/opt/gnuradio/lib
-PATH=/opt/Xilinx/14.6/ISE_DS/ISE/bin/lin64:/opt/Xilinx/14.6/ISE_DS/ISE/sysgen/util:/opt/Xilinx/14.6/ISE_DS/ISE/sysgen/bin:/opt/Xilinx/14.6/ISE_DS/ISE/../../../DocNav:/opt/Xilinx/14.6/ISE_DS/PlanAhead/bin:/opt/Xilinx/14.6/ISE_DS/EDK/bin/lin64:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/microblaze/lin/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/powerpc-eabi/lin/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/arm/lin/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_be/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_le/bin:/opt/Xilinx/14.6/ISE_DS/common/bin/lin64:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games
- XILINX_EDK=/opt/Xilinx/14.6/ISE_DS/EDK
- XILINX_DSP=/opt/Xilinx/14.6/ISE_DS/ISE
- LMC_HOME=/opt/Xilinx/14.6/ISE_DS/ISE/smartmodel/lin64/installed_lin64
- XILINX_PLANAHEAD=/opt/Xilinx/14.6/ISE_DS/PlanAhead
- XILINX=/opt/Xilinx/14.6/ISE_DS/ISE
Then, even I reset *LD_LIBRARY_PATH* and *PATH* to place '
*/opt/uhd/lib:/opt/gnuradio/lib*' and '
*/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games*'
at the beginning of these two variables, respectively, the error messages
still come up.
So I was wondering if anybody met this problem before or it should act like
this.
Thanks.
*Best Regards,Isen I-Chun Chao*
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------------------------------
Message: 9
Date: Tue, 30 Sep 2014 11:32:27 -0700
From: Ian Buckley <[email protected]>
To: Isen I-Chun Chao <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] Error msg of `GLIBCXX_3.4.xx' not found for
uhd_usrp_probe after doing Xilinx ISE environment setting
Message-ID: <[email protected]>
Content-Type: text/plain; charset="us-ascii"
It's a common problem brought about by Xilinx bundling there own libraries with
their tools.
I suggest you just work in separate shells and only run the setup for the
Xilinx tools in wheels you are doing FPGA work in.
In my .bashrc I define an alias of the form:
alias ise14.4='source /opt/Xilinx/14.4/ISE_DS/settings64.sh'
On Sep 30, 2014, at 11:19 AM, Isen I-Chun Chao via USRP-users
<[email protected]> wrote:
> Hi,
> I am building the FPGA image for X3x0 and met a problem about running
> 'uhd_usrp_probe' (or 'uhd_find_device') after 'source settings64.sh'
>
> I use Ubuntu 14.04 on a x86_64 machine and with uhd-3.7.3rc1.
>
> Since I am building the FPGA image with Xilinx ISE 14.6, I first set the
> environment variable for Xilinx ISE, by running 'source
> /opt/Xilinx/14.6/ISE_DS/settings64.sh' and then I am able to get a FPGA image
> by running 'make X310_HGS' in '<uhd_dir>/fpga/usrp3/top/x300'.
>
> However, once I did 'source /opt/Xilinx/14.6/ISE_DS/settings64.sh', I got
> errors from running 'uhd_usrp_probe' or 'uhd_find_device' with the following
> error messages.
>
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.11' not found (required by /opt/uhd/bin/uhd_usrp_probe)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version `GLIBCXX_3.4.9'
> not found (required by /opt/uhd/bin/uhd_usrp_probe)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.15' not found (required by /opt/uhd/bin/uhd_usrp_probe)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.11' not found (required by /opt/uhd/lib/libuhd.so.003)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version `GLIBCXX_3.4.9'
> not found (required by /opt/uhd/lib/libuhd.so.003)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.15' not found (required by /opt/uhd/lib/libuhd.so.003)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version `GLIBCXX_3.4.9'
> not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_program_options.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.11' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_program_options.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.15' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_date_time.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.11' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_regex.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version `GLIBCXX_3.4.9'
> not found (required by /usr/lib/x86_64-linux-gnu/libboost_regex.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.15' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_regex.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version `GLIBCXX_3.4.9'
> not found (required by /usr/lib/x86_64-linux-gnu/libboost_thread.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.15' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_serialization.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.11' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_serialization.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version `GLIBCXX_3.4.9'
> not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_serialization.so.1.54.0)
>
>
> I thought this should be the environment variable problem. So I checked them
> and there are only few env vars are changed and created as shown below:
>
> Before 'source /opt/Xilinx/14.6/ISE_DS/settings64.sh':
> - LD_LIBRARY_PATH=/opt/uhd/lib:/opt/gnuradio/lib
> -
> PATH=/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games
>
> After 'source /opt/Xilinx/14.6/ISE_DS/settings64.sh':
> -LD_LIBRARY_PATH=/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64:/opt/Xilinx/14.6/ISE_DS/ISE/smartmodel/lin64/installed_lin64/lib:/opt/Xilinx/14.6/ISE_DS/ISE/sysgen/lib:/opt/Xilinx/14.6/ISE_DS/EDK/lib/lin64:/opt/Xilinx/14.6/ISE_DS/common/lib/lin64:/opt/uhd/lib:/opt/gnuradio/lib
> -PATH=/opt/Xilinx/14.6/ISE_DS/ISE/bin/lin64:/opt/Xilinx/14.6/ISE_DS/ISE/sysgen/util:/opt/Xilinx/14.6/ISE_DS/ISE/sysgen/bin:/opt/Xilinx/14.6/ISE_DS/ISE/../../../DocNav:/opt/Xilinx/14.6/ISE_DS/PlanAhead/bin:/opt/Xilinx/14.6/ISE_DS/EDK/bin/lin64:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/microblaze/lin/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/powerpc-eabi/lin/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/arm/lin/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_be/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_le/bin:/opt/Xilinx/14.6/ISE_DS/common/bin/lin64:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games
> - XILINX_EDK=/opt/Xilinx/14.6/ISE_DS/EDK
> - XILINX_DSP=/opt/Xilinx/14.6/ISE_DS/ISE
> - LMC_HOME=/opt/Xilinx/14.6/ISE_DS/ISE/smartmodel/lin64/installed_lin64
> - XILINX_PLANAHEAD=/opt/Xilinx/14.6/ISE_DS/PlanAhead
> - XILINX=/opt/Xilinx/14.6/ISE_DS/ISE
>
>
> Then, even I reset LD_LIBRARY_PATH and PATH to place
> '/opt/uhd/lib:/opt/gnuradio/lib' and
> '/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games'
> at the beginning of these two variables, respectively, the error messages
> still come up.
>
> So I was wondering if anybody met this problem before or it should act like
> this.
> Thanks.
>
>
>
>
>
>
>
> Best Regards,
> Isen I-Chun Chao
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
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Message: 10
Date: Tue, 30 Sep 2014 14:44:53 -0400
From: Isen I-Chun Chao <[email protected]>
To: Ian Buckley <[email protected]>
Cc: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] Error msg of `GLIBCXX_3.4.xx' not found for
uhd_usrp_probe after doing Xilinx ISE environment setting
Message-ID:
<CAEG73KrhB2bPsznMKj38DYwL8auGbCerP8FmtkZ4wV=hqmj...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Working with different shells is good idea. Thanks Ian.
*Best Regards,Isen I-Chun Chao*
On Tue, Sep 30, 2014 at 2:32 PM, Ian Buckley <[email protected]> wrote:
> It's a common problem brought about by Xilinx bundling there own libraries
> with their tools.
> I suggest you just work in separate shells and only run the setup for the
> Xilinx tools in wheels you are doing FPGA work in.
> In my .bashrc I define an alias of the form:
>
> alias ise14.4='source /opt/Xilinx/14.4/ISE_DS/settings64.sh'
>
> On Sep 30, 2014, at 11:19 AM, Isen I-Chun Chao via USRP-users <
> [email protected]> wrote:
>
> Hi,
> I am building the FPGA image for X3x0 and met a problem about running '
> *uhd_usrp_probe*' (or '*uhd_find_device*') after '*source settings64.sh*'
>
> I use Ubuntu 14.04 on a x86_64 machine and with uhd-3.7.3rc1.
>
> Since I am building the FPGA image with Xilinx ISE 14.6, I first set the
> environment variable for Xilinx ISE, by running '*source
> /opt/Xilinx/14.6/ISE_DS/settings64.sh*' and then I am able to get a FPGA
> image by running '*make X310_HGS*' in '*<uhd_dir>/fpga/usrp3/top/x300*'.
>
> However, once I did '*source /opt/Xilinx/14.6/ISE_DS/settings64.sh*', I
> got errors from running '*uhd_usrp_probe*' or '*uhd_find_device*' with
> the following error messages.
>
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.11' not found (required by /opt/uhd/bin/uhd_usrp_probe)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.9' not found (required by /opt/uhd/bin/uhd_usrp_probe)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.15' not found (required by /opt/uhd/bin/uhd_usrp_probe)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.11' not found (required by /opt/uhd/lib/libuhd.so.003)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.9' not found (required by /opt/uhd/lib/libuhd.so.003)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.15' not found (required by /opt/uhd/lib/libuhd.so.003)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.9' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_program_options.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.11' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_program_options.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.15' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_date_time.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.11' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_regex.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.9' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_regex.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.15' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_regex.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.9' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_thread.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.15' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_serialization.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.11' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_serialization.so.1.54.0)
> /opt/uhd/bin/uhd_usrp_probe:
> /opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64/libstdc++.so.6: version
> `GLIBCXX_3.4.9' not found (required by
> /usr/lib/x86_64-linux-gnu/libboost_serialization.so.1.54.0)
>
>
> I thought this should be the environment variable problem. So I checked
> them and there are only few env vars are changed and created as shown below:
>
> Before '*source /opt/Xilinx/14.6/ISE_DS/settings64.sh*':
> - LD_LIBRARY_PATH=/opt/uhd/lib:/opt/gnuradio/lib
> -
> PATH=/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games
>
> After '*source /opt/Xilinx/14.6/ISE_DS/settings64.sh*':
>
> -LD_LIBRARY_PATH=/opt/Xilinx/14.6/ISE_DS/ISE/lib/lin64:/opt/Xilinx/14.6/ISE_DS/ISE/smartmodel/lin64/installed_lin64/lib:/opt/Xilinx/14.6/ISE_DS/ISE/sysgen/lib:/opt/Xilinx/14.6/ISE_DS/EDK/lib/lin64:/opt/Xilinx/14.6/ISE_DS/common/lib/lin64:/opt/uhd/lib:/opt/gnuradio/lib
>
> -PATH=/opt/Xilinx/14.6/ISE_DS/ISE/bin/lin64:/opt/Xilinx/14.6/ISE_DS/ISE/sysgen/util:/opt/Xilinx/14.6/ISE_DS/ISE/sysgen/bin:/opt/Xilinx/14.6/ISE_DS/ISE/../../../DocNav:/opt/Xilinx/14.6/ISE_DS/PlanAhead/bin:/opt/Xilinx/14.6/ISE_DS/EDK/bin/lin64:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/microblaze/lin/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/powerpc-eabi/lin/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/arm/lin/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_be/bin:/opt/Xilinx/14.6/ISE_DS/EDK/gnu/microblaze/linux_toolchain/lin64_le/bin:/opt/Xilinx/14.6/ISE_DS/common/bin/lin64:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games
> - XILINX_EDK=/opt/Xilinx/14.6/ISE_DS/EDK
> - XILINX_DSP=/opt/Xilinx/14.6/ISE_DS/ISE
> - LMC_HOME=/opt/Xilinx/14.6/ISE_DS/ISE/smartmodel/lin64/installed_lin64
> - XILINX_PLANAHEAD=/opt/Xilinx/14.6/ISE_DS/PlanAhead
> - XILINX=/opt/Xilinx/14.6/ISE_DS/ISE
>
>
> Then, even I reset *LD_LIBRARY_PATH* and *PATH* to place '
> */opt/uhd/lib:/opt/gnuradio/lib*' and '
> */usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/usr/games:/usr/local/games*'
> at the beginning of these two variables, respectively, the error messages
> still come up.
>
> So I was wondering if anybody met this problem before or it should act
> like this.
> Thanks.
>
>
>
>
>
>
>
>
> *Best Regards,Isen I-Chun Chao*
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
>
>
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Message: 11
Date: Tue, 30 Sep 2014 22:35:04 +0300
From: Birhane Alemayoh <[email protected]>
To: usrp users forum <[email protected]>
Subject: [USRP-users] Loading USRP X3x0 by baseband processing
functions
Message-ID:
<capf4moyf+vzuqy2ocpjxjhwxgefz0-q17grunkrcysex9cs...@mail.gmail.com>
Content-Type: text/plain; charset="iso-8859-1"
Dear All,
I have a very great interest to use the new USRP X3x0 series for my^GSM
baseband signal processing because of its large user-programmable Kintex-7
FPGA. However, i need to implement the baseband processing inside the
USRP's FPGA, not insixe the host PC.
My questionnow is can I implement the whole GSM baseband signal processing
functions inside the FPGA using JTAG programmer? What are the constraints?
Thank u in advance!
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Message: 12
Date: Tue, 30 Sep 2014 12:44:41 -0700
From: Robert McIntyre <[email protected]>
To: "[email protected]" <[email protected]>
Subject: [USRP-users] Success report: B200/USB 3.0 card/Core i7-2600
Message-ID: <[email protected]>
Content-Type: text/plain; charset="iso-8859-1"
Just wanted to drop a quick note about the 100% successful USB transfers I'm
(finally) able to get with my B200. I'm using the following hardware:
- Asus P8Z68 motherboard
- HooToo HT-PC002 USB 3.0 card (based on VIA VL805)
- Core i7-2600 cpu
- 16GB of RAM
- SSD hard drive
- OS: Debian Testing
- UHD: Built from head of master branch
I tried the onboard Intel USB 3 ports, and they weren't able to operate at USB
3.0 at all, they only registered the B200 as USB 2.0. So, I added the
VL805-based USB 3.0 card, and am able to use the UHD benchmark tool with a
--rx_rate of 32e6 with zero overruns/underflows, repeatable.
I'll be setting up gnuradio shortly and loading the CPU down a bit and see how
it works.
I have the same USB 3.0 board in my windows 8.1 box (newer CPU/motherboard),
and it works well, but still experiences some drops at that rate, though 16e6
is rock-solid.
Hope this helps someone else get a good config set up!
Cheers,
Robert
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------------------------------
Message: 13
Date: Tue, 30 Sep 2014 14:06:30 -0700
From: Martin Braun <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] Success report: B200/USB 3.0 card/Core
i7-2600
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Hey Robert,
thanks for the data! Out of curiousity, have you also tried streaming to
disk?
Cheers,
m
On 30.09.2014 12:44, Robert McIntyre via USRP-users wrote:
> Just wanted to drop a quick note about the 100% successful USB transfers
> I'm (finally) able to get with my B200. I'm using the following hardware:
>
> - Asus P8Z68 motherboard
> <http://www.newegg.com/Product/Product.aspx?Item=N82E16813131790>
> - HooToo HT-PC002 USB 3.0 card
> <http://www.amazon.com/HT-PC001-SuperSpeed-Expansion-Connector-Capacitors/dp/B00B9R59ZE/ref=sr_1_7?ie=UTF8&qid=1412105646&sr=8-7&keywords=hootoo+usb3+card>
> (based
> on VIA VL805)
> - Core i7-2600 cpu
> - 16GB of RAM
> - SSD hard drive
> - OS: Debian Testing
> - UHD: Built from head of master branch
>
> I tried the onboard Intel USB 3 ports, and they weren't able to operate
> at USB 3.0 at all, they only registered the B200 as USB 2.0. So, I
> added the VL805-based USB 3.0 card, and am able to use the UHD benchmark
> tool with a --rx_rate of 32e6 with zero overruns/underflows, repeatable.
>
> I'll be setting up gnuradio shortly and loading the CPU down a bit and
> see how it works.
>
> I have the same USB 3.0 board in my windows 8.1 box (newer
> CPU/motherboard), and it works well, but still experiences some drops at
> that rate, though 16e6 is rock-solid.
>
> Hope this helps someone else get a good config set up!
>
> Cheers,
> Robert
>
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
------------------------------
Message: 14
Date: Tue, 30 Sep 2014 14:23:41 -0700
From: Robert McIntyre <[email protected]>
To: Martin Braun <[email protected]>,
"[email protected]" <[email protected]>
Subject: Re: [USRP-users] Success report: B200/USB 3.0 card/Core
i7-2600
Message-ID: <[email protected]>
Content-Type: text/plain; charset="utf-8"
Not yet. I will do that tonight and report back. The disk, though, will
definitely be a concern. I've got a SSD on a SATA-6G link, but expect it to
have problems.
--Robert
________________________________
From: Martin Braun via USRP-users<mailto:[email protected]>
Sent: ?9/?30/?2014 2:06 PM
To: [email protected]<mailto:[email protected]>
Subject: Re: [USRP-users] Success report: B200/USB 3.0 card/Core i7-2600
Hey Robert,
thanks for the data! Out of curiousity, have you also tried streaming to
disk?
Cheers,
m
On 30.09.2014 12:44, Robert McIntyre via USRP-users wrote:
> Just wanted to drop a quick note about the 100% successful USB transfers
> I'm (finally) able to get with my B200. I'm using the following hardware:
>
> - Asus P8Z68 motherboard
> <http://www.newegg.com/Product/Product.aspx?Item=N82E16813131790>
> - HooToo HT-PC002 USB 3.0 card
> <http://www.amazon.com/HT-PC001-SuperSpeed-Expansion-Connector-Capacitors/dp/B00B9R59ZE/ref=sr_1_7?ie=UTF8&qid=1412105646&sr=8-7&keywords=hootoo+usb3+card>
> (based
> on VIA VL805)
> - Core i7-2600 cpu
> - 16GB of RAM
> - SSD hard drive
> - OS: Debian Testing
> - UHD: Built from head of master branch
>
> I tried the onboard Intel USB 3 ports, and they weren't able to operate
> at USB 3.0 at all, they only registered the B200 as USB 2.0. So, I
> added the VL805-based USB 3.0 card, and am able to use the UHD benchmark
> tool with a --rx_rate of 32e6 with zero overruns/underflows, repeatable.
>
> I'll be setting up gnuradio shortly and loading the CPU down a bit and
> see how it works.
>
> I have the same USB 3.0 board in my windows 8.1 box (newer
> CPU/motherboard), and it works well, but still experiences some drops at
> that rate, though 16e6 is rock-solid.
>
> Hope this helps someone else get a good config set up!
>
> Cheers,
> Robert
>
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
_______________________________________________
USRP-users mailing list
[email protected]
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
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Message: 15
Date: Tue, 30 Sep 2014 18:20:53 -0400 (EDT)
From: Urban Hakansson <[email protected]>
To: [email protected]
Subject: [USRP-users] Frequency translation works differently on N210
and B210.
Message-ID:
<[email protected]>
Content-Type: text/plain; charset=utf-8
Hi everybody,
I have a problem. I include below 1) General information, 2) Introduction to my
problem 3) Detailed description of my problem.
General background information about my environment:
Fedora 17 Linux; GNU C++ version 4.7.0 20120507 (Red Hat 4.7.0-5);
Boost_104800; UHD_003.007.001-0-unknown
N210 informationfrom uhd_usrp_probe:
| Device: USRP2 / N-Series Device
| _____________________________________________________
| /
| | Mboard: N210r4
| | hardware: 2577
| | mac-addr: 00:80:2f:0a:e6:15
| | ip-addr: 192.168.2.199
| | subnet: 255.255.255.255
| | gateway: 255.255.255.255
| | gpsdo: none
| | serial: F4A09C
| | FW Version: 12.4
| | FPGA Version: 10.1
B210 information from uhd_usrp_probe:
| Device: B-Series Device
| _____________________________________________________
| /
| | Mboard: B210
| | revision: 4
| | product: 2
| | serial: F571B5
| | FW Version: 4.0
| | FPGA Version: 3.0
Introduction/background: It is my understanding that outputting a real-valued
baseband signal x(t) = a*sin(2*pi*f*t) on an RF carrier fc should result in two
components at fc+f and fc-f, but outputting a complex-valued baseband signal
x(t) = exp(2*pi*f*t) should only result in an fc+f component. The complex
exponential can be used for frequency translation but is causing me serious
problems on the N210 + SBX daughterboard.
Detailed Problem Description: Using GnuRadio I output a simple baseband complex
exponential at frequency +f centered at the RF center frequency fc. Now on the
N210 in addition to the sinusoid at fc+f there is a unexpected replica at fc-f
about 13-14 dB below fc+f. When I run the same script on the B210 and set
master clock rate equal to the sample clock rate, I only see the desired
frequency component at fc+f. There is no replica at fc-f as in the case of the
N210. This is the correct behaviour as I understand it. However, if I don't set
the master clock rate equal to the sample rate on the B210 I do get the
undesired replica at fc-f 13-14 dB below the signal at fc+f just as I did on
the N210.
Why does it only work if the master clock rate is set equal to the sample clock
rate on the B210? I have read somewhere on the mailing list that the FPGA
including CIC and HB filters are bypassed in this case.
Question: How can I output a simple complex-valued baseband signal x(t) =
exp(2*pi*f*t) on an RF carrier fc on the N210 and only get an fc+f component so
I can use this mechanism to perform frequency translation?
Thanks for you consideration.
Regards,
Urban Hakansson
This
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------------------------------
Message: 16
Date: Tue, 30 Sep 2014 20:11:34 -0400
From: "Marcus D. Leech" <[email protected]>
To: [email protected]
Subject: Re: [USRP-users] Frequency translation works differently on
N210 and B210.
Message-ID: <[email protected]>
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
On 09/30/2014 06:20 PM, Urban Hakansson via USRP-users wrote:
> Hi everybody,
>
> I have a problem. I include below 1) General information, 2) Introduction to
> my problem 3) Detailed description of my problem.
>
> General background information about my environment:
> Fedora 17 Linux; GNU C++ version 4.7.0 20120507 (Red Hat 4.7.0-5);
> Boost_104800; UHD_003.007.001-0-unknown
>
> N210 informationfrom uhd_usrp_probe:
> | Device: USRP2 / N-Series Device
> | _____________________________________________________
> | /
> | | Mboard: N210r4
> | | hardware: 2577
> | | mac-addr: 00:80:2f:0a:e6:15
> | | ip-addr: 192.168.2.199
> | | subnet: 255.255.255.255
> | | gateway: 255.255.255.255
> | | gpsdo: none
> | | serial: F4A09C
> | | FW Version: 12.4
> | | FPGA Version: 10.1
>
> B210 information from uhd_usrp_probe:
> | Device: B-Series Device
> | _____________________________________________________
> | /
> | | Mboard: B210
> | | revision: 4
> | | product: 2
> | | serial: F571B5
> | | FW Version: 4.0
> | | FPGA Version: 3.0
>
>
> Introduction/background: It is my understanding that outputting a real-valued
> baseband signal x(t) = a*sin(2*pi*f*t) on an RF carrier fc should result in
> two components at fc+f and fc-f, but outputting a complex-valued baseband
> signal x(t) = exp(2*pi*f*t) should only result in an fc+f component. The
> complex exponential can be used for frequency translation but is causing me
> serious problems on the N210 + SBX daughterboard.
>
> Detailed Problem Description: Using GnuRadio I output a simple baseband
> complex exponential at frequency +f centered at the RF center frequency fc.
> Now on the N210 in addition to the sinusoid at fc+f there is a unexpected
> replica at fc-f about 13-14 dB below fc+f. When I run the same script on the
> B210 and set master clock rate equal to the sample clock rate, I only see the
> desired frequency component at fc+f. There is no replica at fc-f as in the
> case of the N210. This is the correct behaviour as I understand it. However,
> if I don't set the master clock rate equal to the sample rate on the B210 I
> do get the undesired replica at fc-f 13-14 dB below the signal at fc+f just
> as I did on the N210.
>
> Why does it only work if the master clock rate is set equal to the sample
> clock rate on the B210? I have read somewhere on the mailing list that the
> FPGA including CIC and HB filters are bypassed in this case.
>
> Question: How can I output a simple complex-valued baseband signal x(t) =
> exp(2*pi*f*t) on an RF carrier fc on the N210 and only get an fc+f component
> so I can use this mechanism to perform frequency translation?
>
> Thanks for you consideration.
>
> Regards,
>
> Urban Hakansson
>
>
>
> This e-mail may contain privileged, confidential, copyrighted or other
> legally protected information, and is intended exclusively for the intended
> recipient. If you are not the intended recipient (even if the e-mail address
> above is yours), you may not review, store, use, copy, disclose or retransmit
> it in any form. If you are not the intended recipient or otherwise have
> received this by mistake, please immediately notify the sender by return
> e-mail (or [email protected]), then delete the message in its entirety.
> Thank you.
>
> _______________________________________________
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> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Could you perhaps share your Gnu Radio flow-graph with us? It would
help in seeing where your problems might originate.
------------------------------
Message: 17
Date: Tue, 30 Sep 2014 21:27:03 -0700
From: Robert McIntyre <[email protected]>
To: "[email protected]" <[email protected]>
Subject: Re: [USRP-users] Success report: B200/USB 3.0 card/Core
i7-2600
Message-ID: <[email protected]>
Content-Type: text/plain; charset="windows-1256"
Ran some tests tonight...
Using:
rx_samples_to_file --rx_rate 32e6 --freq 107.7e6 --time 10 --file ./testoutput
--stats
I get either a perfect output, or one or two overflows. And, that's to either
my SSD, or my 7200 RPM SATA-6 drive. Which I didn't expect, honestly.
But, I tried:
transport_hammer --rx_rate 32e6
And had very bad results. Not sure what transport_hammer is supposed to do,
though.
Anyway, hope this helps!
Robert
To: [email protected]; [email protected]
Date: Tue, 30 Sep 2014 14:23:41 -0700
Subject: Re: [USRP-users] Success report: B200/USB 3.0 card/Core i7-2600
From: [email protected]
Not yet. I will do that tonight and report back. The disk, though, will
definitely be a concern. I've got a SSD on a SATA-6G link, but expect it to
have problems.
--Robert
From:
Martin Braun via USRP-users
Sent:
?9/?30/?2014 2:06 PM
To:
[email protected]
Subject:
Re: [USRP-users] Success report: B200/USB 3.0 card/Core i7-2600
Hey Robert,
thanks for the data! Out of curiousity, have you also tried streaming to
disk?
Cheers,
m
On 30.09.2014 12:44, Robert McIntyre via USRP-users wrote:
> Just wanted to drop a quick note about the 100% successful USB transfers
> I'm (finally) able to get with my B200. I'm using the following hardware:
>
> - Asus P8Z68 motherboard
> <http://www.newegg.com/Product/Product.aspx?Item=N82E16813131790>
> - HooToo HT-PC002 USB 3.0 card
> <http://www.amazon.com/HT-PC001-SuperSpeed-Expansion-Connector-Capacitors/dp/B00B9R59ZE/ref=sr_1_7?ie=UTF8&qid=1412105646&sr=8-7&keywords=hootoo+usb3+card>
(based
> on VIA VL805)
> - Core i7-2600 cpu
> - 16GB of RAM
> - SSD hard drive
> - OS: Debian Testing
> - UHD: Built from head of master branch
>
> I tried the onboard Intel USB 3 ports, and they weren't able to operate
> at USB 3.0 at all, they only registered the B200 as USB 2.0. So, I
> added the VL805-based USB 3.0 card, and am able to use the UHD benchmark
> tool with a --rx_rate of 32e6 with zero overruns/underflows, repeatable.
>
> I'll be setting up gnuradio shortly and loading the CPU down a bit and
> see how it works.
>
> I have the same USB 3.0 board in my windows 8.1 box (newer
> CPU/motherboard), and it works well, but still experiences some drops at
> that rate, though 16e6 is rock-solid.
>
> Hope this helps someone else get a good config set up!
>
> Cheers,
> Robert
>
>
>
> _______________________________________________
> USRP-users mailing list
> [email protected]
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
>
_______________________________________________
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Message: 18
Date: Wed, 1 Oct 2014 12:10:28 +0000
From: Per Zetterberg <[email protected]>
To: "[email protected]" <[email protected]>
Subject: [USRP-users] Remov MIMO-cable
Message-ID: <[email protected]>
Content-Type: text/plain; charset="us-ascii"
Hi,
I have been using the MIMO cable between pairs of N210s and it has worked fine.
Now I want to remove the cable. I tried to pull with a bit of force but it
doesn't loose. Should I just pull harder?
BR/
Per
------------------------------
Message: 19
Date: Wed, 1 Oct 2014 10:44:12 +0200
From: Thomas Hobiger <[email protected]>
To: "[email protected]" <[email protected]>
Subject: [USRP-users] How to sync to external ref. AND use the MIMO
cable
Message-ID: <[email protected]>
Content-Type: text/plain; charset="utf-8"; format=flowed
Hi list,
I am using two N210s (each with a DBSRX2) which are connected via a MIMO
cable.
The master N210 is fed also with an external 10MHz.
I am using the c++ code below, but I see so many spurious signals
around my center freq. (1.6 GHz) which makes me think that the receiver
does not lock
to the external reference.
usrp->set_clock_source("external", 0);
usrp->set_clock_source("mimo", 1);
usrp->set_time_source("mimo", 1);
Am I missing something in my code or is there any other command which I
need to issue
in order to make my application work with an external ref AND the MIMO
configuration?
Regards,
Thomas
------------------------------
Message: 20
Date: Wed, 1 Oct 2014 10:17:53 +0000 (UTC)
From: john okai <[email protected]>
To: [email protected]
Subject: [USRP-users] rx_sample_to_file not working with --args =
Message-ID: <[email protected]>
Content-Type: text/plain; charset=us-ascii
Hi list,
when I am trying to run rx_samples_to_file, with following command:
./rx_samples_to_file --args="fpga=usrp1_fpga_4rx.rbf" --freq "945000000"
--rate="8000000" $FILE --nsamps
getting following error:
UHD Warning:
Unable to set the thread priority. Performance may be negatively affected.
Please see the general application notes in the manual for instructions.
EnvironmentError: OSError: error in pthread_setschedparam
Creating the usrp device with: fpga=usrp1_fpga_4rx.rbf...
-- Loading firmware image: /usr/share/uhd/images/usrp1_fw.ihx... done
-- Opening a USRP1 device...
-- Loading FPGA image: /usr/share/uhd/images/usrp1_fpga_4rx.rbf... done
-- Using FPGA clock rate of 52.000000MHz...
Error: LookupError: IndexError: multi_usrp::get_tx_subdev_spec(0) failed to
make default spec - ValueError: The subdevice specification "A:0" is too long.
The user specified 1 channels, but there are only 0 tx dsps on mboard 0.
Can any body throw some light, what mistake I am doing.
I am using ubuntu 14.04, 32 bit, gnuradio, 3.7, uhd driver latest installation
------------------------------
Message: 21
Date: Wed, 1 Oct 2014 16:52:22 +0530
From: gsmandvoip <[email protected]>
To: [email protected]
Subject: [USRP-users] rx_samples_to_file issue
Message-ID:
<cade+fgc7k15oxehhbws7vpyotj9s9+dicdmuoq+z+ofbe+-...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Hi list,
when I am trying to run rx_samples_to_file, with following command:
./rx_samples_to_file --args="fpga=usrp1_fpga_4rx.rbf" --freq "945000000"
--rate="8000000" $FILE --nsamps
getting following error:
UHD Warning:
Unable to set the thread priority. Performance may be negatively
affected.
Please see the general application notes in the manual for instructions.
EnvironmentError: OSError: error in pthread_setschedparam
Creating the usrp device with: fpga=usrp1_fpga_4rx.rbf...
-- Loading firmware image: /usr/share/uhd/images/usrp1_fw.ihx... done
-- Opening a USRP1 device...
-- Loading FPGA image: /usr/share/uhd/images/usrp1_fpga_4rx.rbf... done
-- Using FPGA clock rate of 52.000000MHz...
Error: LookupError: IndexError: multi_usrp::get_tx_subdev_spec(0) failed to
make default spec - ValueError: The subdevice specification "A:0" is too
long.
The user specified 1 channels, but there are only 0 tx dsps on mboard 0.
Can any body throw some light, what mistake I am doing.
I am using ubuntu 14.04, 32 bit, gnuradio, 3.7, uhd driver latest
installation
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------------------------------
Message: 22
Date: Wed, 1 Oct 2014 16:26:16 +0200
From: Karthik Reddy <[email protected]>
To: [email protected]
Subject: [USRP-users] Talking to USRP using UHD in Windows 7
Message-ID:
<CAME=qTXyeqBeC=sbv3ssvz1qybv+kmpyqybseemrazvrgl7...@mail.gmail.com>
Content-Type: text/plain; charset="utf-8"
Hello,
I am using USRP B100 with UHD for educational purposes. I would like to
record RF data from USRP into my pc on Windows 7 environment. I have
installed UHD software and python2.7. I also gone through various blogs
there were many related the same but in Ubuntu platform but I would like to
do it on windows. I have installed gnuradio software and also created
Environment path. Still I cannot run my code in python. Can you please
provide me good Kick off for my student project, so that I can talk to USRP
on windows environment.
Best Regards,
Karthik.
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