Hello, We have been using RFNoC to implement a complete radio system (PHY + MAC) on the FPGA with limited control and interfacing in GNURadio. Because the MAC can exhibit arbitrary transmit delay, we need some method to prevent the host from sending packets when the transmit buffer on the FPGA is full. We planned on implementing a split SW/HW buffer to handle this issue. However, to make this scheme work, we need some flow control mechanism to prevent the host from emptying its buffer when there is no room in the FPGA buffer. We have done some Googling and came across references to a flow control mechanism built into CHDR and RFNoC ( https://static1.squarespace.com/static/543ae9afe4b0c3b808d7 2acd/t/55f85bc2e4b067b8c2af4eaf/1442339778410/3-pendlum_jona thon-rfnoc_tutorial_fpga.pdf, http://ionconcepts.com/files/ USRP3_concepts.pdf). However, we are not sure if this flow control mechanism exists only within the FPGA context or if it extends to UHD/GNURadio on the host. We could also not find an example of this form of host to FPGA flow control. Can anyone point us to some flow control examples or documentation? Thanks!
James Dunn & Chris Yarp
_______________________________________________ USRP-users mailing list [email protected] http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
