On 09/01/2017 10:10 PM, Bakshi, Arjun via USRP-users wrote:
So the SBX daughter board has a phase resync feature, which I think
would alleviate my problem. For other boards it is noted in [1] that :
"Most daughterboards use a fractional-N synthesizer ... Generally,
these fractional- N synthesizers introduce a random phase offset after
each retune ..., *this random phase offset will need to be measured
and compensated for in software*."
I'd appreciate pointers on how to do this.
Thank you,
AB
[1]
https://kb.ettus.com/Synchronization_and_MIMO_Capability_with_USRP_Devices
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*From:* Bakshi, Arjun
*Sent:* Friday, September 1, 2017 6:29:49 PM
*To:* Edwin Li; [email protected]
*Subject:* Re: [USRP-users] Changes in wired channel after restarting
flowgraph
The only solution I've found is picking a center frequency that is a
multiple of 64MHz based on this reply by Matt
http://lists.gnu.org/archive/html/discuss-gnuradio/2008-06/msg00017.html
Regards,
AB
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*From:* Edwin Li <[email protected]>
*Sent:* Friday, September 1, 2017 6:13:03 PM
*To:* Bakshi, Arjun; [email protected]
*Subject:* Re: [USRP-users] Changes in wired channel after restarting
flowgraph
Looks like there is a random phase. Every time you start, the phase of
the clock maybe different. Hence when you plot the signal, it's going
to be different. I can observe the same random phase in my BPSK program.
Bakshi, Arjun via USRP-users <[email protected]
<mailto:[email protected]>> 于2017年9月1日周五 下午2:48写道:
Hi all,
Had posted about this before, but focusing on 1 simple case here.
I'm observing a change in a wired channel every time I restart my
flow graph. I'm using 1 USRP + WBX board, i.e. tx and rx on the
same USRP. So time/frequency sync should not be a factor, I believe.
I simply do: start-> sleep(2)-> stop->wait->start->sleep(2)....
looped 10 times, and record the rxed signal. I see that during the
2 seconds the channel remains constant, however after the restart
the channel changes.
Any ideas on why this is happening? I was expecting to see the
same channel no matter how many times I restart the flow or even
power cycle the USRP.
Figures attached: Real and imaginary part of rxed signal,
subsampled ~110 to fit it all in.
Thank you,
Arjun
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If you expect phase consistency *across power-cycle of the hardware*,
that won't happen. There's no way to predict the startup behavior of
the reference clock.
While certain very-specialized hardware might have the property that the
startup phase of the reference clock remains predictable across
power-cycles,
no "general purpose" radio has that property.
Digital receiver code *MUST*, for real-world scenarios, cope with the
fact that the TX and RX will have no tightly-predictable phase and
frequency offsets
from one another, particularly across power-cycles of one of them.
That is the purpose of things like clock recovery, phase-locked loops,
etc, in the RX
chain.
If your algorithms assume that the participating systems are all
"perfectly synchronized", then they aren't necessarily coping with
real-world scenarios.
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