Hey everyone!
This is my very first message, so apologies if I didnt send this correctly 😊. I am also facing the same issue outlined by Paul and would really appreciate some assistance with this. I am using an Ettus USRP E312, GNU Radio 3.7.10.2 <+6137102> and Ubuntu 16.04.3. <+6116043> Here is what I tried. I first started by following the PyBOMBS process in [1] to setup the cross-compile environment on my host machine (laptop). After using sshfs on my sdr (USRP E312) I was unable to use the set_env file in the ~/usr directory, but instead had to source the set_env file in ~/usr/usr. After this, uhd_find_devices was routed properly, but uhd_usrp_probe gave me the following error: Error: RuntimeError: Expected FPGA compatibility number 255.x, but got 14.0: The FPGA build is not compatible with the host code build. Now I think this error is due to the fact that the script was trying to run the default fpga image stored in/usr/share/uhd/images/usrp_e310_fpga_sg3.bit which was developed for an older (or different?) version of UHD. From the uhd_usrp_probe output it says that my current version is UHD_4.0.0.rfnoc-devel-409-gec9138eb so I tried to download the FPGA images for this version and store them inside ~/usr/usr/share/uhd/images/ and running "uhd_usrp_probe --args='fpga=/home/root/usr/usr/share/uhd/images/usrp_e3xx_fpga_idle_sg3.bit'" this loaded up and gave me the exact same output error as what Paul got. I also cannot run any uhd examples and get the same runtime error. Following this, I tried [2], and the fosphor example at the end ran really well. However, again I was unable to run any of the uhd examples after this. I also found issues trying to run a simple BPSK transmitter that I made with the B205. I was unable to use the USRP sink/sources in my GNU Radio flowchart as it gave me the following error when running the python script: Traceback (most recent call last): File "simple_tx_e312.py", line 229, in <module> main() File "simple_tx_e312.py", line 218, in main tb = top_block_cls() File "simple_tx_e312.py", line 68, in __init__ channels=range(1), File "/home/root/usr/usr/lib/python2.7/site-packages/gnuradio/uhd/__init__.py", line 122, in constructor_interceptor return old_constructor(*args) File "/home/root/usr/usr/lib/python2.7/site-packages/gnuradio/uhd/uhd_swig.py", line 2082, in make return _uhd_swig.usrp_sink_make(*args) RuntimeError: RuntimeError: On node 0/FIFO_0, output port 0 is already connected I was able to run code by replacing the USRP Sink with an RFNoC Radio TX block, however the FPGA image is missing the DMAFifo and DUC RFNoC blocks so I directly connected my flowchart to a FIFO buffer -> RFNoC:Radio TXblock. This produced a signal with a desired frequency response, but I was unable to decode the signal when I ran it over the air and via a coaxial cable. I tried many different configurations (over the air and via coaxial cable) including an E312 TX -> E312 (another one) RX, E312 TX -> B205 RX. I also tried B205 TX -> E312 RX and this worked perfectly. B205 TX -> B205 RX with the same code also works well. This is why I think the issue is due to the RFNoC Radio TX block. I am also unable to use the Channel B TX/RX antennas or the GPSDO timing source as the images provided in "uhd-images_4.0.0.rfnoc-devel-238-g39a41476 <+6141476>" and "uhd-images_4.0.0.rfnoc-devel-409-gec9138eb" do not support these options (I can send more specifics about this if it helps, otherwise I will create a new thread in the near future). Lastly, I have been following [3]. At the top of this document it does state " *However*, this document only covers using RFNoC for the USRP X300/X310. Using RFNoC with the E310/E312 will be covered in another document. " which is why I did not initially follow the instructions on this document. Having read that now I found that there are several references to the E310 throughout the document, which was very confusing. The document states that the non-RFNOC fpga images should have DMAFifo and DUC blocks, however whenever I tried loading these images via "uhd_usrp_probe --args='fpga=...'" it always gave me same output as that in Paul's message with always the following blocks included: |* | / *|* | | RFNoC blocks on this device: *|* | | *|* | | * Radio_0 *|* | | * FIFO_0 *|* | | * Window_0 *|* | | * FFT_0 *|* | | * fosphor_0 *|* | | * FIFO_1 *|* | | * FIR_0* My next strategy is to create a custom FPGA image and try this by following the instructions in [3]. Is this the only way to install the DMAFifo, DUC RFNoC blocks to transmit on my E312? I may have made a mistake in my understanding/diagnosis somewhere and would appreciate any help that you may be able to give me. Thank you for your time in advance. Ronakraj References: [1] https://kb.ettus.com/Software_Development_on_the_E310_and_E312 [2] <https://kb.ettus.com/Software_Development_on_the_E310_and_E312> https://kb.ettus.com/Software_Development_on_the_E3xx_USRP_-_Building_RFNoC_UHD_/_GNU_Radio_/_gr-ettus_from_Source [3] <https://kb.ettus.com/Software_Development_on_the_E3xx_USRP_-_Building_RFNoC_UHD_/_GNU_Radio_/_gr-ettus_from_Source> https://kb.ettus.com/Getting_Started_with_RFNoC_Development Getting Started with RFNoC Development - Ettus Knowledge Base <https://kb.ettus.com/Getting_Started_with_RFNoC_Development> kb.ettus.com Abstract. This application note guides a user through basic information on the RFNoC architecture, installing necessary software to develop custom RFNoC blocks, also ... Software Development on the E3xx USRP - Ettus <https://kb.ettus.com/Software_Development_on_the_E3xx_USRP_-_Building_RFNoC_UHD_/_GNU_Radio_/_gr-ettus_from_Source> kb.ettus.com Abstract. This application note is one of a multi-part series which will cover the software development process on the USRP E310, E312 and E313. Software Development on the E310 and E312 - Ettus ... <https://kb.ettus.com/Software_Development_on_the_E310_and_E312> kb.ettus.com Abstract. This application note covers the software development process on the USRP E310 and E312. Overview. Note: Linux only. When developing software for the ...
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