I was able to make an example block by installing uhd+gr-ettus with PyBombs
rfnoc-devel recipes, then using rfnocmodtool, generating .xml and .v files, and
then "compiling and installing" the block from the previously generated
I also included the block in the FPGA code, and uhd_usrp_probe finds it
without an issue.
The thing is this works only inside a sandboxed version of UHD (from branch
rfnoc-devel). If I run uhd_usrp_probe from my system version (compiled from
the last release of maint branch), the new block appears only as Block_0.
Is there any way for UHD v184.108.40.206 to recognize my block properly (beyond
its name, I'm of course intersted in it recognizing all its ports and
registers). I tried copying the .xml declaration file to
/usr/local/share/uhd/rfnoc/blocks/, but that doesn't seem to be enough.
Should I recompile some library? Or is there no other way than using
Thank you again,
USRP-users mailing list