EJ is correct,

and we've applied his patch that reduces the usage. However, we've
discovered a separate issue on current rfnoc-devel, which we're
currently investigating, and recommend everyone to simply locally edit
the local version of rfnoc_ce_auto_inst.

Thanks,
Martin

On 04/19/2018 08:07 AM, EJ Kreinar via USRP-users wrote:
> As a quick followup, it appears that resources requirements are just a
> tad too high for the instantiations defined in rfnoc_ce_auto_inst_e310.v. 
> 
> Editing the file to remove one of the two FIFOs builds successfully.
> 
> EJ
> 
> On Thu, Apr 19, 2018 at 10:19 AM, EJ Kreinar <[email protected]
> <mailto:[email protected]>> wrote:
> 
>     Hi all,
> 
>     I've recently checked out the rfnoc-devel branch of uhd-fpga (which
>     is now set to use Vivado 2017.4), SHA1 9c8c2ba...
> 
>     A default build from scratch (make E310_RFNOC_sg3) seems to fail to
>     place all resources. Here's the tail of my console  output: 
> 
>     [00:13:03] Current task: Placer +++ Current Phase: 1.2 IO Placement/
>     Clock Placement/ Build Placer Device
>     [00:13:32] Current task: Placer +++ Current Phase: 1.3 Build Placer
>     Netlist Model
>     [00:13:33] Current task: Placer +++ Current Phase: 1.4 Constrain
>     Clocks/Macros
>     [00:14:48] Current task: Placer +++ Current Phase: 2 Global Placement
>     [00:14:48] Current task: Placer +++ Current Phase: 3 Detail Placement
>     [00:15:23] Current task: Placer +++ Current Phase: 3.1 Commit Multi
>     Column Macros
>     [00:15:24] Current task: Placer +++ Current Phase: 3.3 Area Swap
>     Optimization
>     [00:15:25] Current task: Placer +++ Current Phase: 3.4 Pipeline
>     Register Optimization
>     ERROR: [Place 30-487] The packing of instances into the device could
>     not be obeyed. There are a total of 13300 slices in the pblock, of
>     which 9305 slices are available, however, the unplaced instances
>     require 9329 slices. Please analyze your design to determine if the
>     number of LUTs, FFs, and/or control sets can be reduced.
>     ERROR: [Place 30-99] Placer failed with error: 'Detail Placement
>     failed please check previous errors for details.'
>     ERROR: [Common 17-69] Command failed: Placer could not place all
>     instances
>     [00:15:56] Current task: Placer +++ Current Phase: 3.5 Small Shape
>     Detail Placement
>     [00:15:56] Current task: Placer +++ Current Phase: Finished
>     [00:15:56] Process terminated. Status: Failure
> 
>     ========================================================
>     Warnings:           656
>     Critical Warnings:  37
>     Errors:             3
> 
>     Makefile.e300.inc:103: recipe for target 'bin' failed
>     make[1]: *** [bin] Error 1
>     make[1]: Leaving directory
>     '/home/ejk/prefix/fpga-ettus/fpga/usrp3/top/e300'
>     Makefile:71: recipe for target 'E310_RFNOC_sg3' failed
>     make: *** [E310_RFNOC_sg3] Error 2
> 
> 
>     This seems a little odd because the post_synth_util.rpt suggests we
>     should have enough resources available after synthesis:
> 
> 
>     +----------------------------+-------+-------+-----------+-------+
>     |          Site Type         |  Used | Fixed | Available | Util% |
>     +----------------------------+-------+-------+-----------+-------+
>     | Slice LUTs*                | 42516 |     0 |     53200 | 79.92 |
>     |   LUT as Logic             | 33321 |     0 |     53200 | 62.63 |
>     |   LUT as Memory            |  9195 |     0 |     17400 | 52.84 |
>     |     LUT as Distributed RAM |  3990 |     0 |           |       |
>     |     LUT as Shift Register  |  5205 |     0 |           |       |
>     | Slice Registers            | 68993 |    12 |    106400 | 64.84 |
>     |   Register as Flip Flop    | 68993 |    12 |    106400 | 64.84 |
>     |   Register as Latch        |     0 |     0 |    106400 |  0.00 |
>     | F7 Muxes                   |  1407 |     0 |     26600 |  5.29 |
>     | F8 Muxes                   |   254 |     0 |     13300 |  1.91 |
>     +----------------------------+-------+-------+-----------+-------+
>     +-------------------+------+-------+-----------+-------+
>     |     Site Type     | Used | Fixed | Available | Util% |
>     +-------------------+------+-------+-----------+-------+
>     | Block RAM Tile    |  121 |     0 |       140 | 86.43 |
>     |   RAMB36/FIFO*    |  108 |     0 |       140 | 77.14 |
>     |     RAMB36E1 only |  108 |       |           |       |
>     |   RAMB18          |   26 |     0 |       280 |  9.29 |
>     |     RAMB18E1 only |   26 |       |           |       |
>     +-------------------+------+-------+-----------+-------+
>     +----------------+------+-------+-----------+-------+
>     |    Site Type   | Used | Fixed | Available | Util% |
>     +----------------+------+-------+-----------+-------+
>     | DSPs           |  142 |     0 |       220 | 64.55 |
>     |   DSP48E1 only |  142 |       |           |       |
>     +----------------+------+-------+-----------+-------+
> 
>     I'll try a build next with less "stuff" in the rfnoc_ce_auto_inst.v
>     -- but is this currently expected behavior?
> 
>     Appreciate the help, thanks!
>     EJ
> 
> 
> 
> 
> 
> 
> _______________________________________________
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> 


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